[GlobalISel][KnownBits] Use KnownBits::urem for G_UREM#193455
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@llvm/pr-subscribers-backend-aarch64 Author: Tejas Gaikwad (tejasgaikwad04) ChangesThis updates the implementation of G_UREM in GlobalISel to use KnownBits::urem instead of reimplementing the logic. Full diff: https://github.com/llvm/llvm-project/pull/193455.diff 2 Files Affected:
diff --git a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
index f0b455fbdc7d0..decca334cf2ee 100644
--- a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
@@ -285,6 +285,22 @@ void GISelValueTracking::computeKnownBitsImpl(Register R, KnownBits &Known,
}
break;
}
+
+ case TargetOpcode::G_UREM: {
+ KnownBits LHSKnown(Known.getBitWidth());
+ KnownBits RHSKnown(Known.getBitWidth());
+
+ computeKnownBitsImpl(MI.getOperand(1).getReg(), LHSKnown, DemandedElts,
+ Depth + 1);
+ computeKnownBitsImpl(MI.getOperand(2).getReg(), RHSKnown, DemandedElts,
+ Depth + 1);
+
+ KnownBits Res = KnownBits::urem(LHSKnown, RHSKnown);
+
+ Known = Res;
+ break;
+ }
+
case TargetOpcode::G_CONSTANT: {
Known = KnownBits::makeConstant(MI.getOperand(1).getCImm()->getValue());
break;
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-urem.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-urem.mir
new file mode 100644
index 0000000000000..b5c70f46a35cc
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-urem.mir
@@ -0,0 +1,20 @@
+# NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+# RUN: llc -mtriple aarch64 -passes="print<gisel-value-tracking>" %s -filetype=null 2>&1 | FileCheck %s
+
+name: urem_pow2
+
+body: |
+ bb.1:
+
+ ; CHECK-LABEL: name: @urem_pow2
+ ; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %1:_ KnownBits:00000000000000000000000000001000 SignBits:28
+ ; CHECK-NEXT: %2:_ KnownBits:00000000000000000000000000000??? SignBits:29
+
+ liveins: $w0
+
+ %0:_(s32) = COPY $w0
+ %1:_(s32) = G_CONSTANT i32 8
+ %2:_(s32) = G_UREM %0, %1
+ $w0 = COPY %2(s32)
+ RET_ReallyLR implicit $w0
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@llvm/pr-subscribers-llvm-globalisel Author: Tejas Gaikwad (tejasgaikwad04) ChangesThis updates the implementation of G_UREM in GlobalISel to use KnownBits::urem instead of reimplementing the logic. Full diff: https://github.com/llvm/llvm-project/pull/193455.diff 2 Files Affected:
diff --git a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
index f0b455fbdc7d0..decca334cf2ee 100644
--- a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
@@ -285,6 +285,22 @@ void GISelValueTracking::computeKnownBitsImpl(Register R, KnownBits &Known,
}
break;
}
+
+ case TargetOpcode::G_UREM: {
+ KnownBits LHSKnown(Known.getBitWidth());
+ KnownBits RHSKnown(Known.getBitWidth());
+
+ computeKnownBitsImpl(MI.getOperand(1).getReg(), LHSKnown, DemandedElts,
+ Depth + 1);
+ computeKnownBitsImpl(MI.getOperand(2).getReg(), RHSKnown, DemandedElts,
+ Depth + 1);
+
+ KnownBits Res = KnownBits::urem(LHSKnown, RHSKnown);
+
+ Known = Res;
+ break;
+ }
+
case TargetOpcode::G_CONSTANT: {
Known = KnownBits::makeConstant(MI.getOperand(1).getCImm()->getValue());
break;
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-urem.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-urem.mir
new file mode 100644
index 0000000000000..b5c70f46a35cc
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-urem.mir
@@ -0,0 +1,20 @@
+# NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+# RUN: llc -mtriple aarch64 -passes="print<gisel-value-tracking>" %s -filetype=null 2>&1 | FileCheck %s
+
+name: urem_pow2
+
+body: |
+ bb.1:
+
+ ; CHECK-LABEL: name: @urem_pow2
+ ; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %1:_ KnownBits:00000000000000000000000000001000 SignBits:28
+ ; CHECK-NEXT: %2:_ KnownBits:00000000000000000000000000000??? SignBits:29
+
+ liveins: $w0
+
+ %0:_(s32) = COPY $w0
+ %1:_(s32) = G_CONSTANT i32 8
+ %2:_(s32) = G_UREM %0, %1
+ $w0 = COPY %2(s32)
+ RET_ReallyLR implicit $w0
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Co-authored-by: Matt Arsenault <arsenm2@gmail.com>
Co-authored-by: Matt Arsenault <arsenm2@gmail.com>
| body: | | ||
| bb.1: | ||
|
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||
| ; CHECK-LABEL: name: @urem_pow2 |
There was a problem hiding this comment.
Test some other cases too, like non-power-of-2 and G_IMPLICIT_DEF
Co-authored-by: Matt Arsenault <arsenm2@gmail.com>
Co-authored-by: Matt Arsenault <arsenm2@gmail.com>
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@arsenm, I have added additional testcases for testing the UREM feature. |
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This updates the implementation of G_UREM in GlobalISel to use KnownBits::urem instead of reimplementing the logic. Supersedes llvm#189087.
This updates the implementation of G_UREM in GlobalISel to use KnownBits::urem instead of reimplementing the logic. Supersedes llvm#189087.
This PR also move case statement for or `G_UREM `that is being introduced by llvm/llvm-project#193455 So that `G_[U|S][DIV|REM] ` being grouped together, just like in `SelectionDAG.cpp` Related: llvm/llvm-project#150515 --------- Signed-off-by: ZakyHermawan <zaky.hermawan9615@gmail.com>
This PR also move case statement for or `G_UREM `that is being introduced by llvm/llvm-project#193455 So that `G_[U|S][DIV|REM] ` being grouped together, just like in `SelectionDAG.cpp` Related: llvm/llvm-project#150515 --------- Signed-off-by: ZakyHermawan <zaky.hermawan9615@gmail.com>
This PR also move case statement for or `G_UREM `that is being introduced by llvm/llvm-project#193455 So that `G_[U|S][DIV|REM] ` being grouped together, just like in `SelectionDAG.cpp` Related: llvm/llvm-project#150515 --------- Signed-off-by: ZakyHermawan <zaky.hermawan9615@gmail.com>
This updates the implementation of G_UREM in GlobalISel to use KnownBits::urem instead of reimplementing the logic.
Supersedes #189087.