Fixing logic to identify proper 'port_config.ini' file.#376
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jleveque merged 1 commit intosonic-net:masterfrom Dec 5, 2017
Merged
Fixing logic to identify proper 'port_config.ini' file.#376jleveque merged 1 commit intosonic-net:masterfrom
jleveque merged 1 commit intosonic-net:masterfrom
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Upon collection of minigraph_facts by ansible scripts, these ones are being unable to identify the proper port-speeds within port_alias.py. In consequence, a bunch of testcases fail and an incorrect minigraph.xml configuration file is generated. Current code assumes that each platform holds its port_config.ini file within a flat folder struct -- something like this: /usr/share/sonic/device/x86_64-dell_z9100_c2538-r0/ |-- Force10-Z9100 | |-- port_config.ini | `-- sai.profile |-- installer.conf |-- minigraph.xml However, there are platforms (e.g. Celestica) that support different port-layouts, and as such, make use of a more structural folder scheme: /usr/share/sonic/device/x86_64-cel_seastone-r0/ |-- Seastone-DX010 | |-- minigraph.xml | |-- port_config.ini | `-- sai.profile |-- Seastone-DX010-10-50 | |-- minigraph.xml | |-- port_config.ini | `-- sai.profile |-- Seastone-DX010-50 | |-- minigraph.xml | |-- port_config.ini | `-- sai.profile The current code will erroneously pick a random port_config.ini file within this folder hierarchy, so i'm fixing the file-identification logic to fully match the SKU being utilized. RB=1172015 G=lnos-reviewers R=ntrianta,rjonnadu,rmolina,sfardeen,zxu A=
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* msft_github/master: Update README.testbed.Setup.md call test by test case name (sonic-net#362) [testbed] fanout add rootfanout connect when deploying fanout switch (sonic-net#368) [lag_2] enable lag_2 test on t0-116 topology (sonic-net#390) [deployment] add missing quotation marks that breaks (sonic-net#386) Finalize T0-116 topology (sonic-net#381) Directed broadcast Test (sonic-net#377) [change_mac]: Change MAC address formatting (sonic-net#380) add github template helping report issues and submit pull request (sonic-net#378) Fixing logic to identify proper 'port_config.ini' file. (sonic-net#376) [sensors] add sensor definitions for arista 7260/7060 (sonic-net#371) [pfc_wd]: Rework for P2 (sonic-net#363) [test]: Update BGP speaker test (sonic-net#236) Add vm_resument which restore paused VMs (sonic-net#297) Copy acsbase files to ptf before ptf_runner (sonic-net#366) Modify dhcp_servers IPs in order to fix DHCP relay test (sonic-net#364) [templates]: Remove trailing space in t1-lag minigraph template (sonic-net#360) [fastreboot test]: Add "fanout_listener" for MLNX fanout switches (sonic-net#353) patch t0 portchannel name to 15 chars (sonic-net#358) [process_checker]: Add the process_checker playbook (sonic-net#349) fix issue 354 (sonic-net#355) Update build instruction for docker-ptf.gz and docker-sonic-mgmt.gz [upgrade_sonic]: Add upgrade_sonic as a convenience script to upgrade the device with an image (sonic-net#338) [acl test]: Generate switch info file. (sonic-net#346) fix t0 templates for generate minigraph (sonic-net#344) [loganalyzer_end.yml]: Rename expected_matches (sonic-net#345) [minigraph_facts]: Add the missing brace (sonic-net#342) [Arista7260cx3] update topology t0-116 to include port 17 and 19 (sonic-net#340) [fdb test] help switch populate mac table before starting the test (sonic-net#341) [arista7260cx3] include port 18 and 20 as 50G breakout ports (sonic-net#339) Loganalyzer enhancements (sonic-net#321) [plugin]: Adding Dell platform in switch connection plugin (sonic-net#333) modified files to get lag members from minigraph (sonic-net#327) [minigraph] modify script to fit the latest configuration method (sonic-net#331) [minigraph_fact] add port mapping for 5 INGRASYS switches (sonic-net#336) [sensors] add sensor data for 5 INGRASYS switches (sonic-net#335) [minigraph-template]: Add ACL L3 and mirroring tables to minigraph template. (sonic-net#330) [acltb-test]: Addopt ACL test to acl-loader. (sonic-net#299) [everflow test]: Addopt Everflow testbed test to acl-loader. (sonic-net#300) Remove hard-coded bgp speaker asn number, fetch from DUT (sonic-net#329) Port alias mapping added for Arista-7060CX-32S-C32 (sonic-net#328) Adding if case for S6100 platform to get port details (sonic-net#314) [interface_facts] improve interface facts checking performance (sonic-net#326) [fdb] Hard code port layout to enable fdb test on t0-116 topology (sonic-net#322) (sonic-net#320) [fib] Hard code port layout to enable fib test on t0-116 topology (sonic-net#322) [fib, fdb] Allow fib and fdb test info files to contain empty lines and comments (sonic-net#323) [lag_test]: Correct typo error for lag tests (sonic-net#325) [link flap test] improve performance of link flap test (sonic-net#319)
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…utlets (sonic-net#376) <!-- Please make sure you've read and understood our contributing guidelines; https://github.com/sonic-net/SONiC/blob/gh-pages/CONTRIBUTING.md Please provide following information to help code review process a bit easier: --> ### Description of PR <!-- - Please include a summary of the change and which issue is fixed. - Please also include relevant motivation and context. Where should reviewer start? background context? - List any dependencies that are required for this change. --> Summary: Fixed power off reboot test to support multiple outlets ### Type of change <!-- - Fill x for your type of change. - e.g. - [x] Bug fix --> - [ ] Bug fix - [x] Testbed and Framework(new/improvement) - [ ] New Test case - [ ] Skipped for non-supported platforms - [ ] Test case improvement ### Back port request - [ ] 202012 - [ ] 202205 - [ ] 202305 - [ ] 202311 - [x] 202405 - [x] 202411 ### Approach #### What is the motivation for this PR? Currently the test was turning off all outlets but turning on only one outlet. It worked for system with 1 outlet, but not for systems with 2 or more. This fix is ensuring that the test will power on all the outlets. #### How did you do it? Changes the turn on to run on all outlets instead of part of them. #### How did you verify/test it? Ran the test #### Any platform specific information? #### Supported testbed topology if it's a new test case? ### Documentation <!-- (If it's a new feature, new test case) Did you update documentation/Wiki relevant to your implementation? Link to the wiki page? -->
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…D automatically (sonic-net#15505) src/sonic-platform-daemons * 78db08e - (HEAD -> 202205, origin/202205) Separate periodic v/s fixed EEPROM reads between threads and optimize xcvrd boot-up time (sonic-net#360) (5 hours ago) [mihirpat1] * 1a672b0 - [ycable] change logging level for stop main loop to NOTICE from ERR (sonic-net#376) (9 hours ago) [vdahiya12]
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… automatically (sonic-net#15748) src/sonic-platform-common * 56f227a - (HEAD -> 202205, origin/202205) More prevention of fatal exception caused by VDM dictionary missing fields when a transceiver has just been pulled (sonic-net#376) (3 hours ago) [snider-nokia]
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Dbconnector namespace support (sonic-net#376) Signed-off-by: Abhishek Dosi <abdosi@microsoft.com>
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… automatically (sonic-net#15917) #### Why I did it src/sonic-platform-common ``` * 411d5b2 - (HEAD -> 202305, origin/202305) More prevention of fatal exception caused by VDM dictionary missing fields when a transceiver has just been pulled (sonic-net#376) (2 days ago) [snider-nokia] ``` #### How I did it #### How to verify it #### Description for the changelog
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Upon collection of minigraph_facts by ansible scripts, these ones are being unable to identify the proper port-speeds within port_alias.py. In consequence, a bunch of testcases fail and an incorrect minigraph.xml configuration file is generated.
Current code assumes that each platform holds its port_config.ini file
within a flat folder struct -- something like this:
However, there are platforms (e.g. Celestica) that support different
port-layouts, and as such, make use of a more structural folder
scheme:
The current code will erroneously pick a random port_config.ini file
within this folder hierarchy, so i'm fixing the file-identification logic to
fully match the SKU being utilized.