[PyTorch] Convert reduced precision gemv vectorized tail loop to use whole vector register instead of half#137916
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swolchok wants to merge 9 commits intogh/swolchok/664/basefrom
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[PyTorch] Convert reduced precision gemv vectorized tail loop to use whole vector register instead of half#137916swolchok wants to merge 9 commits intogh/swolchok/664/basefrom
swolchok wants to merge 9 commits intogh/swolchok/664/basefrom
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…whole vector register instead of half The fixup loop doesn't really need to vectorize the last 7 elements, and not doing so will make migrating to x86 simpler. Differential Revision: [D64280689](https://our.internmc.facebook.com/intern/diff/D64280689/) [ghstack-poisoned]
🔗 Helpful Links🧪 See artifacts and rendered test results at hud.pytorch.org/pr/137916
Note: Links to docs will display an error until the docs builds have been completed. ✅ No FailuresAs of commit 13cf8aa with merge base b9618c9 ( This comment was automatically generated by Dr. CI and updates every 15 minutes. |
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This pull request was exported from Phabricator. Differential Revision: D64280689 |
This was referenced Oct 14, 2024
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…oop to use whole vector register instead of half" The fixup loop doesn't really need to vectorize the last 7 elements, and not doing so will make migrating to x86 simpler. Differential Revision: [D64280689](https://our.internmc.facebook.com/intern/diff/D64280689/) [ghstack-poisoned]
Contributor
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This pull request was exported from Phabricator. Differential Revision: D64280689 |
…oop to use whole vector register instead of half" The fixup loop doesn't really need to vectorize the last 7 elements, and not doing so will make migrating to x86 simpler. Differential Revision: [D64280689](https://our.internmc.facebook.com/intern/diff/D64280689/) [ghstack-poisoned]
Contributor
|
This pull request was exported from Phabricator. Differential Revision: D64280689 |
…oop to use whole vector register instead of half" The fixup loop doesn't really need to vectorize the last 7 elements, and not doing so will make migrating to x86 simpler. Differential Revision: [D64280689](https://our.internmc.facebook.com/intern/diff/D64280689/) [ghstack-poisoned]
Contributor
|
This pull request was exported from Phabricator. Differential Revision: D64280689 |
This was referenced Oct 22, 2024
…oop to use whole vector register instead of half" The fixup loop doesn't really need to vectorize the last 7 elements, and not doing so will make migrating to x86 simpler. Differential Revision: [D64280689](https://our.internmc.facebook.com/intern/diff/D64280689/) cc jgong5 mingfeima XiaobingSuper sanchitintel ashokei jingxu10 [ghstack-poisoned]
Contributor
|
This pull request was exported from Phabricator. Differential Revision: D64280689 |
…oop to use whole vector register instead of half" The fixup loop doesn't really need to vectorize the last 7 elements, and not doing so will make migrating to x86 simpler. Differential Revision: [D64280689](https://our.internmc.facebook.com/intern/diff/D64280689/) cc jgong5 mingfeima XiaobingSuper sanchitintel ashokei jingxu10 [ghstack-poisoned]
Contributor
|
This pull request was exported from Phabricator. Differential Revision: D64280689 |
This was referenced Oct 24, 2024
…oop to use whole vector register instead of half" The fixup loop doesn't really need to vectorize the last 7 elements, and not doing so will make migrating to x86 simpler. Differential Revision: [D64280689](https://our.internmc.facebook.com/intern/diff/D64280689/) cc jgong5 mingfeima XiaobingSuper sanchitintel ashokei jingxu10 [ghstack-poisoned]
Contributor
|
This pull request was exported from Phabricator. Differential Revision: D64280689 |
…oop to use whole vector register instead of half" The fixup loop doesn't really need to vectorize the last 7 elements, and not doing so will make migrating to x86 simpler. Differential Revision: [D64280689](https://our.internmc.facebook.com/intern/diff/D64280689/) cc jgong5 mingfeima XiaobingSuper sanchitintel ashokei jingxu10 [ghstack-poisoned]
Contributor
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This pull request was exported from Phabricator. Differential Revision: D64280689 |
This was referenced Oct 28, 2024
malfet
approved these changes
Oct 29, 2024
…oop to use whole vector register instead of half" The fixup loop doesn't really need to vectorize the last 7 elements, and not doing so will make migrating to x86 simpler. Differential Revision: [D64280689](https://our.internmc.facebook.com/intern/diff/D64280689/) cc jgong5 mingfeima XiaobingSuper sanchitintel ashokei jingxu10 [ghstack-poisoned]
Contributor
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This pull request was exported from Phabricator. Differential Revision: D64280689 |
This was referenced Oct 29, 2024
pytorchmergebot
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Oct 29, 2024
…s for non-ARM architectures too (#137917) Remove reasons to gate it on ARM. Differential Revision: [D64280687](https://our.internmc.facebook.com/intern/diff/D64280687/) Pull Request resolved: #137917 Approved by: https://github.com/malfet ghstack dependencies: #137661, #137911, #137912, #137913, #137914, #137915, #137916
rahulsingh-intel
pushed a commit
to rahulsingh-intel/pytorch
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Nov 5, 2024
…whole vector register instead of half (pytorch#137916) The fixup loop doesn't really need to vectorize the last 7 elements, and not doing so will make migrating to x86 simpler. Differential Revision: [D64280689](https://our.internmc.facebook.com/intern/diff/D64280689/) Pull Request resolved: pytorch#137916 Approved by: https://github.com/malfet ghstack dependencies: pytorch#137661, pytorch#137911, pytorch#137912, pytorch#137913, pytorch#137914, pytorch#137915
rahulsingh-intel
pushed a commit
to rahulsingh-intel/pytorch
that referenced
this pull request
Nov 5, 2024
…s for non-ARM architectures too (pytorch#137917) Remove reasons to gate it on ARM. Differential Revision: [D64280687](https://our.internmc.facebook.com/intern/diff/D64280687/) Pull Request resolved: pytorch#137917 Approved by: https://github.com/malfet ghstack dependencies: pytorch#137661, pytorch#137911, pytorch#137912, pytorch#137913, pytorch#137914, pytorch#137915, pytorch#137916
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Stack from ghstack (oldest at bottom):
The fixup loop doesn't really need to vectorize the last 7 elements, and not doing so will make migrating to x86 simpler.
Differential Revision: D64280689
cc @jgong5 @mingfeima @XiaobingSuper @sanchitintel @ashokei @jingxu10