AMDGPU: Avoid introducing illegal fminnum_ieee/fmaxnum_ieee#177418
AMDGPU: Avoid introducing illegal fminnum_ieee/fmaxnum_ieee#177418
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Keep bf16/f16 values encoded as the low half of a 32-bit register, instead of promoting to float. This avoids unwanted FP effects from the fpext/fptrunc which should not be implied by just passing an argument. This also fixes ABI divergence between SelectionDAG and GlobalISel. I've wanted to make this change for ages, and failed the last few times. The main complication was the hack to return shader integer types in SGPRs, which now needs to inspect the underlying IR type.
This prevents a regression in a future change.
Avoid introducing fminnum_ieee/fmaxnum_ieee on f16 if f16 is not legal. This avoids regressing minimum/maximum cases in a future commit.
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@llvm/pr-subscribers-backend-amdgpu @llvm/pr-subscribers-llvm-globalisel Author: Matt Arsenault (arsenm) ChangesAvoid introducing fminnum_ieee/fmaxnum_ieee on f16 if f16 Full diff: https://github.com/llvm/llvm-project/pull/177418.diff 1 Files Affected:
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 0ba66af9bd41c..69d73975bf9ef 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -15273,8 +15273,9 @@ SDValue SITargetLowering::performMinMaxCombine(SDNode *N,
// for some types, but at a higher cost since it's implemented with a 3
// operand form.
const SDNodeFlags Flags = N->getFlags();
- if ((Opc == ISD::FMINIMUM || Opc == ISD::FMAXIMUM) &&
- !Subtarget->hasIEEEMinimumMaximumInsts() && Flags.hasNoNaNs()) {
+ if ((Opc == ISD::FMINIMUM || Opc == ISD::FMAXIMUM) && Flags.hasNoNaNs() &&
+ !Subtarget->hasIEEEMinimumMaximumInsts() &&
+ isOperationLegal(ISD::FMINNUM_IEEE, VT.getScalarType())) {
unsigned NewOpc =
Opc == ISD::FMINIMUM ? ISD::FMINNUM_IEEE : ISD::FMAXNUM_IEEE;
return DAG.getNode(NewOpc, SDLoc(N), VT, Op0, Op1, Flags);
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| class CCIfNotInReg<CCAction A> : CCIf<"!ArgFlags.isInReg()", A> {} | ||
| class CCIfExtend<CCAction A> | ||
| : CCIf<"ArgFlags.isSExt() || ArgFlags.isZExt()", A>; | ||
| class CCIfOrigTypeShaderCCIsSGPR<CCAction A> |
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It does not look like a part of this change.
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If you don't rebase stacked PRs, it looks like all the previous patches from the already merged branches are here. you have to look at the top commit only
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I see, but top commit does not seem to have tests.
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It triggers in the existing minimum tests after #177419, I'm not sure how to trick the legalization steps into getting here until then

Avoid introducing fminnum_ieee/fmaxnum_ieee on f16 if f16
is not legal. This avoids regressing minimum/maximum cases
in a future commit.