[SYCL][UR][L0] First version of UR L0 adapter#8744
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againull merged 50 commits intointel:syclfrom May 26, 2023
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Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
intel#8982 Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
* Fix failing device CTS Signed-off-by: Brandon Yates <brandon.yates@intel.com>
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
intel#9203 Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
intel#9243 Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
intel#9275 Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
intel#9300 Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
* Fixes for porting to UR repo (#4) * Fixes for porting to UR repo Signed-off-by: Brandon Yates <brandon.yates@intel.com>
pi_bool is uint32_t and ur_bool_t is uint8_t, so to make sure correct functionality is maintain, use uint32_t as replacement for pi_bool, instead of ur_bool_t. Also, add back check for urMemImageCreate that was before in piMemImageCreate. Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
- Add changes to fix tests after [SYCL] Add Unified Runtime plugin and route to it with SYCL_PREFER_UR intel#9232 Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
Signed-off-by: Brandon Yates <brandon.yates@intel.com>
intel#9442 Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
…ke_queue and get_native intel#8871 Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
intel#9503 Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
intel#9446 Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
intel#9409 Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
this to absorb latest changes in queue native handle APIs Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
intel#9555 Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
Signed-off-by: Brandon Yates <brandon.yates@intel.com>
intel#9610 Signed-off-by: Jaime Arteaga <jaime.a.arteaga.molina@intel.com>
smaslov-intel
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May 26, 2023
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Some CI errors being addressed in |
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Signed-off-by: Jaime Arteaga jaime.a.arteaga.molina@intel.com
Signed-off-by: Brandon Yates brandon.yates@intel.com
Signed-off-by: Callum Fare callum@codeplay.com