[SYCL][Doc] First revision of standard layout relaxation extension#1344
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bader merged 2 commits intointel:syclfrom Mar 25, 2020
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Signed-off-by: Michael Kinsner <michael.kinsner@intel.com>
keryell
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Mar 19, 2020
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keryell
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That seems like a useful extension.
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| Sharing data structures between host and device code imposes certain restrictions, such as use of only user defined classes that are {cpp}11 trivially copyable classes for the data structures, classes that are {cpp}11 trivially copyable classes for the data structures, and in general, no pointers initialized for the host can be used on the device. |
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It would clearer with smaller lines.
For example to see that you can remove the repetition ", classes that are {cpp}11 trivially copyable classes for the data structures,"
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Fixed the bug, and will consider wrapping lines :)
Ruyk
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Mar 19, 2020
Ruyk
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Looks good, is there any way of checking an implementation has support for this extension? macro with the name?
romanovvlad
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Mar 22, 2020
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| == Overview | ||
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| SYCL 1.2.1 required data stored into a buffer or passed as a kernel argument to be standard layout. This is in addition to the data also being trivially copyable. This extension relaxes the standard layout requirement while leaving the trivially copyable requirement intact. |
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| SYCL 1.2.1 required data stored into a buffer or passed as a kernel argument to be standard layout. This is in addition to the data also being trivially copyable. This extension relaxes the standard layout requirement while leaving the trivially copyable requirement intact. | |
| SYCL 1.2.1 requires data stored into a buffer or passed as a kernel argument to be standard layout. This is in addition to the data also being trivially copyable. This extension relaxes the standard layout requirement while leaving the trivially copyable requirement intact. |
Signed-off-by: Michael Kinsner <michael.kinsner@intel.com>
Author
We didn't include a specific macro but it is active when the language version macro is >1.2.1. Do you think that this one needs an additional macro? If so I can update the spec. |
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@bader ready to merge from my perspective |
Pennycook
approved these changes
Mar 25, 2020
romanovvlad
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Mar 25, 2020
alexbatashev
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Mar 27, 2020
…hinx * upstream/sycl: (357 commits) [Support] Implement a simple tabular data management library (intel#1358) [Support] Implement a property set I/O library (intel#1357) [SYCL] Fix buffer constructor using iterators (intel#1386) [SYCL][FPGA] Enable a set of loop attributes (intel#1312) [Driver][SYCL][FPGA] Proper dependency output location when given /Fo<dir> (intel#1346) [SPIR-V] Enabling SPIR-V builtin lookup in device SYCL mode (intel#1384) [SYCL][NFC] Unify setting kernel arguments (intel#1379) [SYCL][Doc] First revision of standard layout relaxation extension (intel#1344) [SYCL] Fixed sub-buffer alloca search (intel#1385) [SYCL][FPGA] Emit multiple IR variants for the IVDep attribute (intel#1383) [SYCL] Add experimental flag to enable front-end optimizations (intel#1376) [SYCL] Remove unexpected double in complex SPIR-V for float support (intel#1381) [SYCL] Default work-group sizes based on max (intel#952) [SYCL][CUDA] Fix usage of multiple backends in the same program (intel#1252) [SPIR-V] Add SPIR-V builtin definitions to the builtin lookup. [SPIR-V] Add macro definition when -fdeclare-spirv-builtins is activated [SYCL] Fix sycl_generic printing [SYCL] Support intel::reqd_work_group_size (intel#1328) [SYCL][NFC] Make the RT::PiPlugin object private (intel#1375) [SPIRV] Add convergent attribute to SPIR-V built-ins (intel#1373) ...
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Signed-off-by: Michael Kinsner michael.kinsner@intel.com