.@OpenSingularity’s Skynet Project, a network of intelligent machines using blockchain, #IoT & #AI, is making a core chip based on @risc_v. @ndahad shares more on @eetimes: ubm.io/2KhtiFF
RISC-V International
12K posts
RISC-V International
@risc_v
RISC-V International is the non-profit home of the open standard RISC-V Instruction Set Architecture (ISA), related specifications, and stakeholder community.
Joined July 2014
- Next week’s @risc_v Bay Area Meetup will feature @Google discussing @TensorFlow Lite on @risc_v, @antmicro discussing Renode and @hex_five discussing embedded security! Join us on Nov. 1 in Milpitas, Calif. at @westerndigital: bit.ly/2SchFVA
- 🚀 Exciting news from Raspberry Pi! They've just launched the new RP2350 microcontroller and Pico 2 development board, now featuring #RISCV support. This $5 board opens up a world of possibilities for developers and enthusiasts alike. Learn more ➡ riscv.org/news/2024/08/r…
- Exciting news from #RISCVSummitChina, as Frans Sijstermans from NVIDIA announces CUDA is coming to RISC-V! This port will enable a RISC-V CPU to be the main application processor in a CUDA-based AI system. #RISCV #RISCVEverywhere
- “In fifteen years, RISC-V has gone from an academic project at UC Berkeley to one of the major technological trends in compute.” The momentum continues to build! @AllAboutCircuit’s Jake Hertz breaks down the latest updates, including: - Andrea Gallo appointed CEO of RISC-V
- .@oe1cxw of @symbiotic_eda is the winner of this year’s RISC-V Board of Directors Technical Leadership Award. @risc_v is honored to recognize her achievements in the emerging open source EDA tools ecosystem.
- Milk-V Technology is preparing to launch a high-performance #RISCV computer. The 64-core Milk-V Pioneer supports up to 128GB of RAM in user-upgradable DDR4 DIMM modules. @Hacksterio has more: hubs.la/Q01RWmch0 #RISCVeverywhere #InTheNews
- Explaining Computers recently put five RISC-V SBCs to the test: Orange Pi RV2, Banana Pi BPI-F3, Cyped Lite Pi 3A, Milk-V Jupiter, and VisionFive 2. From performance benchmarks and software support to storage speeds and power efficiency, each board highlighted progress and
- RISC-V startup @incoresemi has unveiled its SoC Generator platform, a deterministic automation tool that slashes SoC design time from months to under 10 minutes. Built to accelerate RISC-V innovation, this is a major step forward for faster, more flexible SoC development. Learn
- Ever dreamed of creating your own RISC-V processor from scratch? The One Student One Chip (OSOC) project is empowering the next generation of processor designers and computer architects! Watch the unpacking and functional verification of the StarrySky development board by OSOC
00:00 - Cloud-based RISC-V servers are here. Fabien Piuzzi of @Scaleway shared how their team launched the first cloud-based RISC-V offering. The session covers: 🧩 The motivation behind the project ⚙️ Technical & deployment challenges 🔮 What’s next for RISC-V in datacenters 📺
- Happy 15th Birthday, RISC-V! Fifteen years since Krste Asanovic, Yunsup Lee, Andrew Waterman, and David Patterson at UC Berkeley finally agreed to create a new instruction architecture (ISA), RISC-V has become the world’s 3rd largest, powering everything from edge AI to
- 🖥️ RISC-V Innovation: A talented high schooler created LinuxPDF, software that runs Linux inside a PDF using a small RISC-V emulator called TinyEMU. This project highlights the versatility of RISC-V and the creativity of young innovators pushing tech boundaries. Want to learn
