The UPA-USB Logic Analyzer is a device that captures digital data from a system under test by triggering on a sequence of digital events. After connecting the probes, the user programs the analyzer with the signal names and chooses a capture mode based on an internal clock source. A trigger condition can be set to trigger on a rising/falling edge or logical "0/1" of a single signal. When the mode is chosen, the user can set the analyzer to "run" mode.
A logic analyzer can trigger on a complicated sequence of digital events, and then capture a large amount of digital data from the system under test. Once the probes are connected, the user programs the analyzer with the names of each signal. Next, a capture mode is chosen, where the input signals are sampled at regular intervals based on an internal clock source. After the mode is chosen, a trigger condition may be set. A trigger condition can be triggering on a rising/falling edge or logical "0/1" of a single signal (Trigger input). At this point, the user sets the analyzer to "run" mode. Once the data is captured, it is displayed by waveform window.
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