winch(arm64): and, or, xor, shifts#8921
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Signed-off-by: Edoardo Vacchi <evacchi@users.noreply.github.com>
Signed-off-by: Edoardo Vacchi <evacchi@users.noreply.github.com>
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I'll take a look at this one. |
winch/codegen/src/isa/aarch64/asm.rs
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| impl Into<ALUOp> for ShiftKind { | ||
| fn into(self) -> ALUOp { | ||
| match self { | ||
| ShiftKind::Shl => ALUOp::Lsl, | ||
| ShiftKind::ShrS => ALUOp::Asr, | ||
| ShiftKind::ShrU => ALUOp::Lsr, | ||
| ShiftKind::Rotr => ALUOp::RotR, | ||
| // Rotl is implemented as neg+ROR. | ||
| ShiftKind::Rotl => unimplemented!(), | ||
| } | ||
| } | ||
| } |
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Given that this operation can fail, maybe we should avoid implementing Into/From and instead create a helper method in the Assembler itself, by extracting:
let shift_op: ALUOp = if kind == ShiftKind::Rotl {
// Emulate Rotr with rm := neg(rm); with neg(x) := sub(zero, x).
self.emit_alu_rrr(ALUOp::Sub, regs::zero(), rn, rn, size);
ALUOp::RotR
} else {
kind.into()
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refactored and moved to shift_kind_to_alu_op()
Signed-off-by: Edoardo Vacchi <evacchi@users.noreply.github.com>
Signed-off-by: Edoardo Vacchi <evacchi@users.noreply.github.com>
Signed-off-by: Edoardo Vacchi <evacchi@users.noreply.github.com>
This commit includes very minor clean-ups, these are mechanical changes only. * Rename `shift_rr` to `shift`, as we're still passing the context in, the callee can decide what to do with the instruction arguments. * Delete the un-used `Into<AluOp> for ShiftKind`
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This looks good to me, thanks!
For visibility, here's a recap of an offline discussion between @evacchi and myself:
- @evacchi is on PTO for the next couple of weeks and therefore suggested pushing any required changes on top of this PR in order to take it to the finish line.
- I pushed e18681c, which is a mechanical change only.
Given the recent changes I was thinking it might make sense to get a second review on this change.
@elliottt, would you be able to provide a second pass on this change?
elliottt
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This looks good to me as well!
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Wonderful thanks for pushing this to the finish line!! ❤️❤️ |
Follow up to #8321.
Adds support to binary and, binary or, binary xor (eor), shl, shrS, shrU, rotr, rotl.