Fold weight permutation inside quantized conv operator#26241
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dzhulgakov wants to merge 8 commits intogh/dzhulgakov/2/basefrom
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Fold weight permutation inside quantized conv operator#26241dzhulgakov wants to merge 8 commits intogh/dzhulgakov/2/basefrom
dzhulgakov wants to merge 8 commits intogh/dzhulgakov/2/basefrom
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This was referenced Sep 14, 2019
According to #19092 we always keep NCHW order and do handling inside the kernels. This PR fixes it for weights of the qconv by using MemoryLayout mechanism. [ghstack-poisoned]
Contributor
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What about quantize linear ops? |
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What do you mean about linear? Linear ops don't have memory order Also cc @VitalyFedyunin to verify that memory format stuff looks good |
supriyar
reviewed
Sep 17, 2019
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| b = torch.randn(oC, dtype=torch.float32) if use_bias else None | ||
| q_bias = torch.quantize_linear(b, scale=1.0 / 1024, zero_point=0, dtype=torch.qint32) if use_bias else None | ||
| q_filters_ref = torch.ops.quantized.conv_prepack(qw.permute([0, 2, 3, 1]), |
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Don't you also need similar changes to the tests in test_quantized.py?
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oh, I think I put it accidentally in #26242 - let me just squash them together
added 2 commits
September 17, 2019 20:04
According to #19092 we always keep NCHW order and do handling inside the kernels. This PR fixes it for weights of the qconv by using MemoryLayout mechanism. [ghstack-poisoned]
According to #19092 we always keep NCHW order and do handling inside the kernels. This PR fixes it for weights of the qconv by using MemoryLayout mechanism. [ghstack-poisoned]
Contributor
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Please don't land, I need to read it carefully. |
VitalyFedyunin
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Sep 18, 2019
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Memory Format manipulations looks good!
raghuramank100
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Sep 18, 2019
added 3 commits
September 18, 2019 18:00
According to #19092 we always keep NCHW order and do handling inside the kernels. This PR fixes it for weights of the qconv by using MemoryLayout mechanism. Differential Revision: [D17443219](https://our.internmc.facebook.com/intern/diff/D17443219) [ghstack-poisoned]
According to #19092 we always keep NCHW order and do handling inside the kernels. This PR fixes it for weights of the qconv by using MemoryLayout mechanism. Differential Revision: [D17443219](https://our.internmc.facebook.com/intern/diff/D17443219) [ghstack-poisoned]
According to #19092 we always keep NCHW order and do handling inside the kernels. This PR fixes it for weights of the qconv by using MemoryLayout mechanism. Differential Revision: [D17443219](https://our.internmc.facebook.com/intern/diff/D17443219) [ghstack-poisoned]
supriyar
reviewed
Sep 19, 2019
| W_KRSC = W.permute([0, 2, 3, 1]).contiguous() | ||
| if channelwise: | ||
| W_q = torch.quantize_linear_per_channel(W_KRSC, | ||
| W_q = torch.quantize_linear_per_channel(W, |
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Thanks for changing this too. Did you test it locally by setting PYTORCH_TEST_WITH_QNNPACK ?
supriyar
reviewed
Sep 19, 2019
| scales.toType(kDouble), | ||
| zero_points.toType(kLong), | ||
| {output_channels, kernel_h, kernel_w, C_per_G}, | ||
| {output_channels, C_per_G, kernel_h, kernel_w}, |
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Do we need to change it similarly for QNNPACK as well below since we store it as MemoryFormat::ChannelsLast in the packed struct?
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No, you store the original Tensor and it's fine to return Tensor in ChannelLast format (it'd just happen to be non-contiguous but still semantically correct)
According to #19092 we always keep NCHW order and do handling inside the kernels. This PR fixes it for weights of the qconv by using MemoryLayout mechanism. Differential Revision: [D17443219](https://our.internmc.facebook.com/intern/diff/D17443219) [ghstack-poisoned]
zdevito
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Sep 19, 2019
Summary: Pull Request resolved: pytorch/pytorch#26241 According to pytorch/pytorch#19092 we always keep NCHW order and do handling inside the kernels. This PR fixes it for weights of the qconv by using MemoryLayout mechanism. Test Plan: Imported from OSS Differential Revision: D17443219 Pulled By: dzhulgakov fbshipit-source-id: ce0eb92034a9977b3303dafab8b0414575171062
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@dzhulgakov merged this pull request in d5daac7. |
laurentdupin
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to laurentdupin/pytorch
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Apr 24, 2026
Summary: Pull Request resolved: pytorch#26241 According to pytorch#19092 we always keep NCHW order and do handling inside the kernels. This PR fixes it for weights of the qconv by using MemoryLayout mechanism. Test Plan: Imported from OSS Differential Revision: D17443219 Pulled By: dzhulgakov fbshipit-source-id: ce0eb92034a9977b3303dafab8b0414575171062
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Stack from ghstack:
According to #19092 we always keep NCHW order and do handling inside the kernels. This PR fixes it for weights of the qconv by using MemoryLayout mechanism.
Differential Revision: D17443219