better error message in load_state_dict when there are inconsistent tensor sizes#2151
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soumith merged 1 commit intopytorch:masterfrom Jul 19, 2017
greaber:master
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better error message in load_state_dict when there are inconsistent tensor sizes#2151soumith merged 1 commit intopytorch:masterfrom greaber:master
soumith merged 1 commit intopytorch:masterfrom
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soumith
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thanks a lot @greaber . Better messages for all :) |
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http://rocm-ci.amd.com/blue/organizations/jenkins/rocm-pytorch-manylinux-wheel-builder/detail/rocm-pytorch-manylinux-wheel-builder/2009/pipeline/131/ `/pytorch/.github/scripts/amd/package_triton_wheel.sh: line 54: syntax error in conditional expression` Validation: http://rocm-ci.amd.com/job/mainline-pytorch2.6-manylinux-wheels/79/
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…iton kernels User-defined Triton kernels (via @triton.jit or @triton_op) that take bool tensor arguments produce incorrect results when compiled through AOTI. The root cause is that Triton's mangle_type maps torch.bool tensors to *i1/*u1 (1-bit pointer), but PyTorch stores bool tensors as uint8 (1 byte per element). The compiled cubin kernel generates bit-packed loads for *i1/*u1 pointers, reading garbled data from the byte-addressed memory. Inductor-generated kernels already work around this (Triton issue #2151) by adding .to(tl.int1) after loads and converting to int8 for stores. But user-defined kernels don't get these workarounds since their code is user-written. Fix: override *i1/*u1 -> *u8 in the mangle_type signature for user-defined kernels. This makes the compiled kernel use byte-addressed loads matching PyTorch's bool memory layout.
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…iton kernels User-defined Triton kernels (via @triton.jit or @triton_op) that take bool tensor arguments produce incorrect results when compiled through AOTI. The root cause is that Triton's mangle_type maps torch.bool tensors to *i1/*u1 (1-bit pointer), but PyTorch stores bool tensors as uint8 (1 byte per element). The compiled cubin kernel generates bit-packed loads for *i1/*u1 pointers, reading garbled data from the byte-addressed memory. Inductor-generated kernels already work around this (Triton issue #2151) by adding .to(tl.int1) after loads and converting to int8 for stores. But user-defined kernels don't get these workarounds since their code is user-written. Fix: override *i1/*u1 -> *u8 in the mangle_type signature for user-defined kernels. This makes the compiled kernel use byte-addressed loads matching PyTorch's bool memory layout.
mergennachin
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…iton kernels User-defined Triton kernels (via @triton.jit or @triton_op) that take bool tensor arguments produce incorrect results when compiled through AOTI. The root cause is that Triton's mangle_type maps torch.bool tensors to *i1/*u1 (1-bit pointer), but PyTorch stores bool tensors as uint8 (1 byte per element). The compiled cubin kernel generates bit-packed loads for *i1/*u1 pointers, reading garbled data from the byte-addressed memory. Inductor-generated kernels already work around this (Triton issue #2151) by adding .to(tl.int1) after loads and converting to int8 for stores. But user-defined kernels don't get these workarounds since their code is user-written. Fix: override *i1/*u1 -> *u8 in the mangle_type signature for user-defined kernels. This makes the compiled kernel use byte-addressed loads matching PyTorch's bool memory layout.
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I have often got the message "inconsistent tensor sizes" from
load_state_dict, usually just because I am trying to load a checkpoint with a different version of the code or a different configuration. This patch makes it easier to locate the problem.