[GlobalIsel][AArch64] fix out of range access in regbankselect#92072
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[GlobalIsel][AArch64] fix out of range access in regbankselect#92072
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@llvm/pr-subscribers-llvm-globalisel @llvm/pr-subscribers-backend-aarch64 Author: Thorsten Schütt (tschuett) ChangesFixes #92062 Full diff: https://github.com/llvm/llvm-project/pull/92072.diff 2 Files Affected:
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
index 44ba9f0429e67..7785e020eaaf1 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
@@ -600,8 +600,11 @@ bool AArch64RegisterBankInfo::isLoadFromFPType(const MachineInstr &MI) const {
EltTy = GV->getValueType();
// Look at the first element of the struct to determine the type we are
// loading
- while (StructType *StructEltTy = dyn_cast<StructType>(EltTy))
+ while (StructType *StructEltTy = dyn_cast<StructType>(EltTy)) {
+ if (StructEltTy->getNumElements() == 0)
+ break;
EltTy = StructEltTy->getTypeAtIndex(0U);
+ }
// Look at the first element of the array to determine its type
if (isa<ArrayType>(EltTy))
EltTy = EltTy->getArrayElementType();
diff --git a/llvm/test/CodeGen/AArch64/pr92062.ll b/llvm/test/CodeGen/AArch64/pr92062.ll
new file mode 100644
index 0000000000000..0f911d2571f6d
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/pr92062.ll
@@ -0,0 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
+; RUN: llc -mtriple=aarch64 -O0 -global-isel -global-isel-abort=2 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
+
+target triple = "arm64"
+
+@p = external global { {}, { ptr } }
+
+define void @foo() {
+; CHECK-LABEL: foo:
+; CHECK: // %bb.0: // %bb
+; CHECK-NEXT: adrp x8, :got:p
+; CHECK-NEXT: ldr x8, [x8, :got_lo12:p]
+; CHECK-NEXT: ldr x8, [x8]
+; CHECK-NEXT: mov x9, xzr
+; CHECK-NEXT: str x8, [x9]
+; CHECK-NEXT: ret
+bb:
+ %i1 = load ptr, ptr @p, align 8
+ store ptr %i1, ptr null, align 8
+ ret void
+}
|
arsenm
approved these changes
May 14, 2024
dianqk
approved these changes
May 14, 2024
| @@ -600,8 +600,11 @@ bool AArch64RegisterBankInfo::isLoadFromFPType(const MachineInstr &MI) const { | |||
| EltTy = GV->getValueType(); | |||
| // Look at the first element of the struct to determine the type we are | |||
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| // Look at the first element of the struct to determine the type we are | |
| // Look at the first valid element of the struct to determine the type we are |
It seems we should also update the comment.
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May 14, 2024
…92072) Fixes llvm#92062 (cherry picked from commit d422e90)
tstellar
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May 15, 2024
…92072) Fixes llvm#92062 (cherry picked from commit d422e90)
tstellar
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May 16, 2024
…92072) Fixes llvm#92062 (cherry picked from commit d422e90)
Tedlion
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Jun 15, 2025
…92072) Fixes llvm#92062 (cherry picked from commit d422e90)
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Fixes #92062