The issue is caused by a wrong layout for the bias tensor.   
For example, we consider a bias tensor of shape (64, ) and its layout
can be written as
`(64, ): (1, )`
However, we can expand the layout by adding axes with 1-shape.  
For example, 
`(64, 1):(1, 1)`
Since the shape is equal to 1, the stride can be any number. The stride
corresponding to the 1-shape actually doesn't affect the computation of
the address. But two strides that are equal to one will influence the
instruction selection, and the invalid memory instruction leads to the
misaligned access.
To fix this issue, we force the stride paired with 1-shape to be 0. The
layout is equivalent when computing the memory address, and this will
help the compiler make the right decision in the instruction selection
pass.
closes #404

Co-authored-by: xiaocenxiaocen <xiao.zhang@centml.ai>

The issue is caused by a wrong layout for the bias tensor.   
For example, we consider a bias tensor of shape (64, ) and its layout
can be written as
`(64, ): (1, )`
However, we can expand the layout by adding axes with 1-shape.  
For example, 
`(64, 1):(1, 1)`
Since the shape is equal to 1, the stride can be any number. The stride
corresponding to the 1-shape actually doesn't affect the computation of
the address. But two strides that are equal to one will influence the
instruction selection, and the invalid memory instruction leads to the
misaligned access.
To fix this issue, we force the stride paired with 1-shape to be 0. The
layout is equivalent when computing the memory address, and this will
help the compiler make the right decision in the instruction selection
pass.
closes #404

Co-authored-by: xiaocenxiaocen <xiao.zhang@centml.ai>

The issue is caused by a wrong layout for the bias tensor.   
For example, we consider a bias tensor of shape (64, ) and its layout
can be written as
`(64, ): (1, )`
However, we can expand the layout by adding axes with 1-shape.  
For example, 
`(64, 1):(1, 1)`
Since the shape is equal to 1, the stride can be any number. The stride
corresponding to the 1-shape actually doesn't affect the computation of
the address. But two strides that are equal to one will influence the
instruction selection, and the invalid memory instruction leads to the
misaligned access.
To fix this issue, we force the stride paired with 1-shape to be 0. The
layout is equivalent when computing the memory address, and this will
help the compiler make the right decision in the instruction selection
pass.
closes #404

Co-authored-by: xiaocenxiaocen <xiao.zhang@centml.ai>