Port of https://github.com/gtaylormb/opl2_fpga which is an OPL3->OPL2 conversion of https://github.com/gtaylormb/opl3_fpga, which was merged into https://github.com/MiSTer-devel/ao486_MiSTer in April 2024.

This is specifically targetted for easy drop-in on cores for the MiSTer platform--the parameters in opl2_pkg.sv and the top level ports in opl2_fpga.sv have been targetted to MiSTer, but this could be used anywhere.