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JIT: update epilog exit size assert for x86 #25302
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With the advent of dotnet#25251 we can now see the epilog exit sequence on x86 vary by as much as 6 bytes. Update the assert accordingly.
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cc @dotnet/jit-contrib Example from bug is: ; Assembly listing for method TestCase.Test:Fact1(byref,byref):int
;; 7 byte mov + jmp
B80C639907 mov eax, 0x799630C
FF20 jmp dword ptr [eax]TestCase.Test:Fact1(byref,byref):int
;; 1 byte ret
C3 ret |
BruceForstall
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Jun 21, 2019
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Seems weird we generate a 'ret' there instead of an 'int 3'
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It is a different epilog -- I just edited out the rest of the code. Here's the full disassembly: G_M33028_IG01:
55 push ebp
8BEC mov ebp, esp
83EC0C sub esp, 12
33C0 xor eax, eax
8945F4 mov dword ptr [ebp-0CH], eax
894DFC mov bword ptr [ebp-04H], ecx
8955F8 mov bword ptr [ebp-08H], edx
G_M33028_IG02:
833D6C52990700 cmp dword ptr [0799526CH], 0
7405 je SHORT G_M33028_IG03
E8C99F7F4E call CORINFO_HELP_DBG_IS_JUST_MY_CODE
G_M33028_IG03:
8B45FC mov eax, bword ptr [ebp-04H]
833801 cmp dword ptr [eax], 1
7F09 jg SHORT G_M33028_IG04
C745F445230100 mov dword ptr [ebp-0CH], 0x12345
EB25 jmp SHORT G_M33028_IG06
G_M33028_IG04:
8B45F8 mov eax, bword ptr [ebp-08H]
8B00 mov eax, dword ptr [eax]
8B55FC mov edx, bword ptr [ebp-04H]
0FAF02 imul eax, dword ptr [edx]
8B55F8 mov edx, bword ptr [ebp-08H]
8902 mov dword ptr [edx], eax
8B45FC mov eax, bword ptr [ebp-04H]
FF08 dec dword ptr [eax]
8B4DFC mov ecx, bword ptr [ebp-04H]
8B55F8 mov edx, bword ptr [ebp-08H]
G_M33028_IG05:
8BE5 mov esp, ebp
5D pop ebp
B80C639907 mov eax, 0x799630C
FF20 jmp dword ptr [eax]TestCase.Test:Fact1(byref,byref):int
G_M33028_IG06:
8B45F4 mov eax, dword ptr [ebp-0CH]
G_M33028_IG07:
8BE5 mov esp, ebp
5D pop ebp
C3 ret
; Total bytes of code 92, prolog size 17 for method TestCase.Test:Fact1(byref,byref):intNote on x86 we always can fit the indir cell address into a 32 bit displacement, so following up on #25286 would compact this back down. |
AndyAyersMS
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Jun 24, 2019
On x86 we can always reach any IAT_PVALUE entry via a 32 bit indirect jump, and proper handling of jmp epilogs depends on this. So check if the target address is reachable in 32 bits, and if so, use the jmp [addr] form on x86, and the jmp [rip + disp] form for x64. Fixes #25345 Fixes #25346 Undoes the assertion change from dotnet#25302 Fixes #25286
jkotas
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Jun 24, 2019
On x86 we can always reach any IAT_PVALUE entry via a 32 bit indirect jump, and proper handling of jmp epilogs depends on this. So check if the target address is reachable in 32 bits, and if so, use the jmp [addr] form on x86, and the jmp [rip + disp] form for x64. Fixes #25345 Fixes #25346 Undoes the assertion change from #25302 Fixes #25286
picenka21
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Feb 18, 2022
With the advent of dotnet/coreclr#25251 we can now see the epilog exit sequence on x86 vary by as much as 6 bytes. Update the assert accordingly. Fixes dotnet/coreclr#25301. Commit migrated from dotnet/coreclr@e31c78b
picenka21
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Feb 18, 2022
…r#25348) On x86 we can always reach any IAT_PVALUE entry via a 32 bit indirect jump, and proper handling of jmp epilogs depends on this. So check if the target address is reachable in 32 bits, and if so, use the jmp [addr] form on x86, and the jmp [rip + disp] form for x64. Fixes dotnet/coreclr#25345 Fixes dotnet/coreclr#25346 Undoes the assertion change from dotnet/coreclr#25302 Fixes dotnet/coreclr#25286 Commit migrated from dotnet/coreclr@bad8d91
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With the advent of #25251 we can now see the epilog exit sequence on x86 vary
by as much as 6 bytes. Update the assert accordingly.