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| ;;@ (= (extract 2 0 (arg)) (0i3:bv)) | ||
| ;;@ )), | ||
| ;;@ (= (arg) (ret)) | ||
| ;;@ )) |
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To get around the "query width unused", we need more complicated logic for (= (arg) (ret)): Imm12 can be a different width from Value.
On option would be something like:
(= (arg) (conv_to (widthof (arg)) (ret))
avanhatt
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Looks good to me!
A weird subset of tests are actually failing, but I don't see why from this PR.
Should I wait to merge? Do you think it might be due to the |
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Let me try to run locally first, will report back in a few. |
| ( | ||
| "Imm12".to_owned(), | ||
| annotation_ir::Type::BitVectorWithWidth(12), | ||
| annotation_ir::Type::BitVectorWithWidth(24), |
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Looks like this change is making the failing tests fail locally, too. Doing a quick pass to see if I can update them.
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No tests failing, but these two failed to terminate after 3 hours in CI: |
I've definitely run all the |
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Things now work locally, so force merging |
This gets us another step closer to running the Wasmtime tests.
Generate ASLp-based spec for the `BitRR` instruction `Cls` opcode. Updates #35 #42 avanhatt#62
Allow to map host directory as arbitary guest path
…nce#12779) If we emit a value label alias for an instruction that isn't lowered, then that signals that the value has been optimised out. However, since it is an alias we know that the value also exists in an earlier vreg, so we should skip the alias and use that instead. This situation occurs often for memory indexes on AArch64. We translate memory stores into instructions such as: v8 = iconst.i32 42 v9 = uextend.i64 v6 v10 = load.i64 notrap aligned readonly can_move checked v0+56 v11 = iadd v10, v9 v12 = iconst.i64 20 v13 = iadd v11, v12 ; v12 = 20 store little heap v8, v13 ; v8 = 42 Here, v6 is a memory index (which has a label) and v9 is an extension of the memory index (which has a label alias, added by cast_index_to_pointer_ty()). This is lowered to: 40c: 52800540 mov w0, #0x2a // #42 410: f9401c41 ldr x1, [x2, avanhatt#56] 414: 91005021 add x1, x1, #0x14 418: b8384820 str w0, [x1, w24, uxtw] The uextend has been folded into the str, so v9 has been optimised out. But v6 is still present in w24, so the debuginfo should use that instead. This fixes the following tests for AArch64: native_debug::lldb::dwarf_cold_block native_debug::lldb::dwarf_fib_wasm native_debug::lldb::dwarf_fib_wasm_dwarf5 native_debug::lldb::dwarf_fib_wasm_split4 native_debug::lldb::dwarf_fission native_debug::lldb::dwarf_fraction_norm native_debug::lldb::dwarf_imported_memory native_debug::lldb::dwarf_shared_memory native_debug::lldb::dwarf_simple native_debug::lldb::dwarf_spilled_frame_base
Works, but since type inference prioritizes known bit widths, it thinks the args to
iaddhave whatever widthimm12has. This is causing "query width unused."