Conversation
…ely, reorganized FDCAN1 KConfig options
…ore without waiting; ensures non-blocking operations work as intended
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Hi @rippetoej there are some Coding Styles that need to be fixed. |
based on PR apache#2987
based on PR apache#2987
based on PR apache#2987
based on PR apache#2987
based on PR apache#2987
based on PR apache#2987
based on PR apache#2987
based on PR apache#2987
based on PR apache#2987
based on PR apache#2987
based on PR apache#2987
based on PR apache#2987
based on PR apache#2987
based on PR apache#2987
Hi, is there any example code that I can refer to send/receive classic CAN messages on stm32h7? |
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Is there anything that can be done with this PR or may I close it? |
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@linguini1 It has been a long while since I have revisited this code and I’m sure it needs a good bit of attention to get compiling again. I don’t actively work with NuttX anymore unfortunately, but I could try to revisit it. For what it’s worth, I used this code alongside PX4 for a few years for CAN comms between boards in a professional project. I can’t commit to adding any new features, but if there is interest in merging what is here I can take a crack at that. Unfortunately my free time to dedicate to this is pretty limited so it might take me awhile as well. |
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@raiden00pl, you are more knowledgeable about CAN than I am. IS it worth revisiting this PR? |
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@linguini1 SocketCAN interface is already supported for STM32H7. This driver implements legacy approach to CAN driver, which has its advantages and I personally prefer to use it. So I think this driver makes sense. I might need this driver soon, so I can take care of it when I have some free time. |
Summary
This is a draft PR. Style checks will fail and there is still some code that needs to be cleaned up and reviewed. I want to get this out in the open so others can get eyes on it.
The STM32H7 FDCAN block is a significant departure from the F7 and F4, so a lot has changed here. Fortunately, the SAMv7 series of chips use a nearly identical version of this IP, so that driver served as the starting point. The major difference between this controller and the one present in the F7 and F4 is the presence of the Message RAM. This is a 10 kB block of SRAM dedicated entirely to the FDCAN block and shared by the two independent FDCAN controllers. Each controller instantiates RX/TX FIFOs and buffers here to hold CAN messages. Also instantiated here are separate sets of filters for standard and extended length ID messages. The layout of the message ram is incredibly important to the proper operation of the controllers, so it is imperative that the driver get this right. The layout of the message RAM is fully configurable by the user via menuconfig. To help prevent invalid configurations, each config option has appropriate limits and a compile-time check ensures that the limits of the message RAM are not exceeded.
In its current state, the driver is functioning properly, but there is room for considerable improvement. Things that work:
Impact
Adds a shiny new driver!
Testing
Used the can example app to send a few thousand extended and standard length ID messages per test. I ran several of these tests in both blocking and non-blocking mode. I also tested using the FDCAN controller's built in hardware loopback as well as between two separate boards running the can example app. As as side note, I had to modify the can example app to get this to work properly, so I should probably commit that too.
The driver has also been used to send and receive standard length ID messages to CAN-based device controllers. These were sent alongside extended ID messages passed by UAVCAN without issue.
Important notes and things that need to be worked on