* Phase 2: Implement pixel loop, stipple test, W-depth, Z-depth, and depth test

Add the core pixel pipeline loop structure to the ARM64 Voodoo JIT:

- Stipple test: both pattern stipple (bit lookup from real_y/x position)
  and rotating stipple (ROR + TBZ on bit 31)
- Tiled X calculation for tiled framebuffer modes
- W-depth computation using CLZ (ARM64 equivalent of x86 BSR) with proper
  clamping to 0..0xFFFF
- Z-buffer depth from state->z with SAR 12 and signed clamping
- Depth bias (zaColor addition with 16-bit mask)
- All 8 DEPTHOP modes: NEVER (immediate RET), LESSTHAN, EQUAL,
  LESSTHANEQUAL, GREATERTHAN, NOTEQUAL, GREATERTHANEQUAL, ALWAYS
- Per-pixel state increments: ib/ig/ir/ia via NEON 4xS32 ADD/SUB,
  z via GPR, tmu0/tmu1 s/t via NEON 2xD64 ADD/SUB, tmu0/tmu1 w and
  global w via GPR 64-bit ADD/SUB
- Pixel and texel counter increments
- Forward branch patching macros (PATCH_FORWARD_BCOND, PATCH_FORWARD_B,
  PATCH_FORWARD_TBxZ, PATCH_FORWARD_CBxZ)
- ARM64 bitmask immediate macros (AND_BITMASK, ANDS_BITMASK, ORR_BITMASK,
  TST_BITMASK, AND_MASK convenience wrappers)
- Texture fetch placeholder calls for Phase 3 integration

The depth test uses unsigned comparison (depth values are 0..0xFFFF) with
appropriate ARM64 condition codes: CS for >=, HI for >, LS for <=, CC for <.


* Add test VM launch helper script

Create scripts/test-with-vm.sh to launch 86Box with the
Windows 98 Low End test VM (configured with Voodoo card).

Usage: ./scripts/test-with-vm.sh


* Phase 2 complete: mark checklist and update changelog

Runtime test passed:
- Quake 3: black screen (expected)
- 3DMark 99: gray screen (expected)
- No crashes, depth pipeline executes correctly

Color/texture pipeline not yet implemented (Phase 3-4).

Implement codegen_texture_fetch() and TMU combine paths for ARM64:
- Perspective-correct W division using SDIV (replaces x86 IDIV)
- LOD calculation via CLZ (replaces BSR, inverted: 63-CLZ)
- Point-sampled texture lookup with clamp/wrap S/T
- Bilinear filtered 4-tap blend using NEON (UXTL+MUL+ADD+EXT+USHR+SQXTUN)
- Mirror S/T via TBZ+MVN (replaces TEST+JZ+NOT)
- TMU0-only, TMU1-passthrough, and dual-TMU combine paths
- Dual-TMU tc_mselect/tc_add/tc_invert for RGB + tca_* for alpha
- trexInit1 override path
- Upstream bug at x86 line 1303 (0x8E) NOT ported — correct ADD used

Bug fixes discovered during review:
- Bilinear LDR D addressing: added LSL w4, w4, #2 before 64-bit texel
  pair loads to convert texel index to byte offset (ARM64 LDR Dt has no
  LSL #2 option, unlike x86 MOVQ with *4 scaling)
- LOD mantissa shift: changed LSR_REG to LSR_REG_X (64-bit) since the
  W reciprocal after LSL #8 can exceed 32 bits
- AND_BITMASK for 0xF0 mask: corrected from (N=0,immr=24,imms=27) which
  was an invalid encoding to (N=0,immr=28,imms=3) per ARM64 logical
  immediate rules
- Added #include <stddef.h> for offsetof() in _Static_assert checks