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cpu/stm32f1: modernized peripheral GPIO driver#3535

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PeterKietzmann merged 4 commits intoRIOT-OS:masterfrom
haukepetersen:opt_f1_gpio
Aug 6, 2015
Merged

cpu/stm32f1: modernized peripheral GPIO driver#3535
PeterKietzmann merged 4 commits intoRIOT-OS:masterfrom
haukepetersen:opt_f1_gpio

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@haukepetersen
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One more CPU on the bright side :-)

Code size before (tests/periph_gpio, iot-lab_M3):

   text    data     bss     dec     hex
  16492     120    2888   19500    4c2c

and after:

   text    data     bss     dec     hex
  15244     120    2888   18252    474c

Savings ~1,2k

@haukepetersen haukepetersen added Type: enhancement The issue suggests enhanceable parts / The PR enhances parts of the codebase / documentation Platform: ARM Platform: This PR/issue effects ARM-based platforms Type: cleanup The issue proposes a clean-up / The PR cleans-up parts of the codebase / documentation labels Jul 31, 2015
@kaspar030
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nice!

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stm32f1 family

@PeterKietzmann
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The changes look valid to me at a first glance. I don't have all boards here to test, just the iot-lab_M3. Will do now

@PeterKietzmann
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The transceiver driver seems so work correctly on the iot-lab_M3 node. Does anyone know the pin-setup of the iot-lab connector? Can anyone test this on spark-core and fox?

@PeterKietzmann
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Ok, how do we proceed? @haukepetersen did you test it on spark-core and/or fox boards? We don't have those...

@haukepetersen
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I will try it out and fix the comments tomorrow.

@haukepetersen
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addressed comments and added missing implementation of the init_af function. Will make a follow up PR to adjust the other peripheral drivers accordingly.

@haukepetersen
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I am un-able to test the spark-core, my board seems to be electrically broken...

@haukepetersen
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found one more bug in the _port_pin() function, a -2 offset was missing...

@PeterKietzmann
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Why is this offset needed?
I tested this PR again on iot-lab_M3 with tests/driver_at86rf2xx and tests/periph_gpio. It seems to be fine.

@haukepetersen
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Without the offset, Port A would lead to 2 -> which breaks the clock initialization. This just did not show, as the clocks were also activated hard-coded by other peripheral drivers...

@PeterKietzmann PeterKietzmann added the CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR label Aug 5, 2015
@haukepetersen
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two more fixes:

  • removed the GPIO_xx defines from the iot-labs periph_conf
  • enable GPIO clock in gpio_init_af function

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Could you shortly explain these values? Maybe referring to the reference manual (sec.9.2.1, p. 171 or table 20, p.161)? I think it's much faster than figuring this out by myself

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Sure: To understand them, have a look at the gpio_init function and how they are used. I made a bit-map table with the configuration values for the CR[L|H] register and then tried to map the values of DIR and PP to this table. The values you see here is what you get.

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Ah, I totally overlooked if (dir == GPIO_DIR_OUT) there

@PeterKietzmann
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@haukepetersen on iot-lab_M3 I tested tests/periph_gpio, tests/driver_at86rf2xx, examples/default with success. Travis gives us green light. I think no one else will test this on fox and spark-core. So this is an ACK. Please squash your latest commits (or at least remove the "s")

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squashed. Waiting for Travis once more to make sure I did not break anything while squashing...

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Let's do this. ACK and go

PeterKietzmann added a commit that referenced this pull request Aug 6, 2015
cpu/stm32f1: modernized peripheral GPIO driver
@PeterKietzmann PeterKietzmann merged commit 68d0519 into RIOT-OS:master Aug 6, 2015
@haukepetersen haukepetersen deleted the opt_f1_gpio branch August 6, 2015 12:42
@mayman99 mayman99 mentioned this pull request Sep 17, 2015
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CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR Platform: ARM Platform: This PR/issue effects ARM-based platforms Type: cleanup The issue proposes a clean-up / The PR cleans-up parts of the codebase / documentation Type: enhancement The issue suggests enhanceable parts / The PR enhances parts of the codebase / documentation

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3 participants