@gebart I think it could take some days until I'll review this PR. Are there any other volunteers?

@gebart : Are the schematics of this device availlable ?

@benoit-canet please comment inside the PR, not in the commit (compare Developement Procedures point 5.). And btw: Thanks for reviewing. AFAIK @gebart is on holiday until the next week. I assume you already found the mulle wiki?

@benoit-canet Thank you for reviewing.

The schematics of the board are not publicly available, but https://github.com/eistec/mulle/wiki/Mulle-board-overview contains a short description of the on-board devices.

• check return value of mulle_nvram_init
• added todo comment about hwtimer_init
• added comment on why Vperiph has to be turned on early
• rebased

#define MULLE_NVRAM_SPI_DEV SPI_2 /**< FRAM SPI bus */

Please add a comment mentioning that SPI_2 is mapped to SPI0 in RIOT because comparing this line with the wiki is confusing. (The only hint is burried in a header)

The cleanup middle commit does two very differents things (initializing different path and removing code) it should be split in two.

Ack once this is done.

@gebart will you adapt @benoit-canet 's proposed changes and rebase?

Will update this later, I will be kind of busy the next two weeks or so

OKay. Just saw that @benoit-canet already ACKed this one (when small change and cleanup is done)

@gebart could you please squash (at least the latest commit) so we can run Travis.

rebased, added a comment about SPI_2 being mapped to hardware SPI0 and immediately squashed. The cleanup of the old files was merged as a separate PR.

added extern "C" to mulle-nvram.h and immediately squashed.

I dare to hit the button now. And go