[1/N] Support NIXL-based L2 storage in MP mode by YaoJiayi · Pull Request #2664 · LMCache/LMCache

YaoJiayi · 2026-03-02T01:26:44Z

What this PR does / why we need it:
Initial support of Nixl-based L2 adapter.

TODOs:

Eviction is not handled
E2E testing
E2E testing with CB
Unit test for different nixl backends (currently only have tests for POSIX backend)
Documentation on how to enable l2 storage with NIXL in mp mode
KV cache persistence

Special notes for your reviewers:

If applicable:

this PR contains user facing changes - docs added
this PR contains unit tests

Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn>

gemini-code-assist · 2026-03-02T01:27:06Z

Summary of Changes

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This pull request significantly enhances the LMCache's distributed storage capabilities by introducing support for NIXL as an L2 storage backend. It refines memory management by enabling lazy initialization for paged allocators, ensuring that memory is allocated efficiently and correctly based on actual KV cache requirements. These changes facilitate more robust and performant L2 caching in multi-process setups, particularly when dealing with large-scale language models.

Highlights

NIXL-based L2 Storage Adapter: Introduced a new L2 adapter, NixlStoreL2Adapter, to support NIXL (NVIDIA In-Memory eXchange Library) for efficient L2 cache storage in multi-process environments. This adapter handles memory registration, data transfers (store/load), and object management using NIXL's capabilities.
Lazy Memory Initialization for Paged Allocators: Implemented lazy initialization for paged memory allocators (PagedCpuMemoryAllocator, PagedCpuGpuMemoryAllocator). This allows the CPU memory for these allocators to be allocated only after KV cache shapes and dtypes are known, which is crucial for NIXL's memory registration requirements.
New Configuration Options: Added a use_page flag to L1MemoryManagerConfig to enable page-aligned memory allocation. A new NixlStoreL2AdapterConfig was also introduced to configure the NIXL backend, parameters, and pool size.
Integration into L1 and Storage Managers: Integrated the lazy_init_memory functionality into L1MemoryManager and StorageManager to ensure that paged allocators are correctly initialized with KV cache metadata during the register_kv_cache process in the multi-process server.

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Changelog

lmcache/v1/distributed/config.py
- Added use_page field to L1MemoryManagerConfig to control page-aligned memory allocation.
lmcache/v1/distributed/l1_manager.py
- Imported torch for type hinting.
- Added lazy_init_memory method to L1MemoryManager to support deferred memory allocation for paged allocators.
lmcache/v1/distributed/l2_adapters/base.py
- Introduced lazy_init_memory as an interface method in L2AdapterInterface for lazy memory initialization.
lmcache/v1/distributed/l2_adapters/config.py
- Defined NixlStoreL2AdapterConfig for configuring NIXL L2 storage, including backend type, parameters, and pool size.
- Registered NixlStoreL2AdapterConfig with the L2 adapter type system.
lmcache/v1/distributed/l2_adapters/nixl_store_l2_adapter.py
- Added a new file implementing NixlStoreL2Adapter and NixlStorageAgent to provide NIXL-based L2 caching functionality.
lmcache/v1/distributed/memory_manager.py
- Imported MemoryFormat, PagedCpuGpuMemoryAllocator, and PagedCpuMemoryAllocator.
- Modified create_memory_allocator to instantiate PagedCpuMemoryAllocator when use_page is enabled.
- Implemented lazy_init_memory in L1MemoryManager to initialize paged allocators with KV cache shapes and dtypes.
- Updated get_vm_space to handle PagedCpuMemoryAllocator.
- Adjusted get_memory_usage to correctly report usage for paged allocators and handle uninitialized memory.
lmcache/v1/distributed/storage_manager.py
- Imported torch for type hinting.
- Added lazy_init_memory method to StorageManager to propagate lazy initialization calls to the L1 manager.
lmcache/v1/memory_management.py
- Introduced PagedAddressManager to provide memory usage statistics for paged allocators.
- Added address_manager attribute to PagedTensorMemoryAllocator.
- Implemented PagedCpuMemoryAllocator for paged memory allocation on CPU, supporting lazy initialization.
lmcache/v1/multiprocess/server.py
- Added a call to storage_manager.lazy_init_memory during KV cache registration to ensure proper initialization of paged allocators.

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Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn>

gemini-code-assist

Code Review

This pull request introduces support for NIXL-based L2 storage in multi-process mode, including a new NIXL L2 adapter, configuration options, and updates to the memory management system for paged memory allocation. However, several security issues were identified, including potential Denial of Service vulnerabilities due to unvalidated input in the ZMQ server and mismatched configuration keys, as well as insecure file creation in the NIXL storage adapter that could lead to data corruption or symlink attacks. Additionally, the review noted areas for improvement such as silently ignored exceptions, opportunities to use zip(..., strict=True) for robustness, simplification of a configuration class with a dataclass, and a misleading docstring in the memory management code. Addressing these points will significantly improve the robustness, security, and maintainability of the new code.

Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com>

Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn>

ApostaC

1

ApostaC · 2026-03-02T20:42:51Z

+        for i in range(num_pages):
+            filename = f"obj_{i}_{uuid.uuid4().hex[0:4]}.bin"
+            tmp_path = os.path.join(file_path, filename)
+            fd = os.open(tmp_path, flags)
+            fds.append(fd)


The IBM storage team complained about this this morning. Let's see how we can improve this.

Persistence will be handled in followup prs

ApostaC · 2026-03-02T20:45:26Z

+            for i, key in enumerate(keys):
+                if (obj := self._memory_objects.get(key)) is None:


Does this mean we will never have a "real" lookup in the storage, but just rely on in-proc states?

Currently we are doing in-process lookup

Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn>

Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com>

ApostaC

Some minor comments. Otherwise LGTM.

ApostaC · 2026-03-03T20:12:14Z

+        self.nixl_agent.deregister_memory(self.mem_reg_descs)
+
+
+class NixlStoreL2Adapter(L2AdapterInterface):


Can we add the intialization code into l2_adapters/__init__.py?

Oh right, the code for init is already merged. Updated

ApostaC · 2026-03-03T20:18:44Z

+            raise RuntimeError("NIXL transfer failed")
+
+    def get_storage_indices(self, num_objs: int) -> list[int]:
+        return self.pool.batched_allocate(num_objs)


We do allocate here, but where do we free?

Will be handled in the eviction pr. Feels we might need to reuse the eviction code across different adapters and also l1 memory.

ApostaC · 2026-03-03T20:20:02Z

+        except Exception:
+            success = False
+
+        with self._lock:
+            for key, storage_obj in zip(keys, storage_objs, strict=False):
+                self._memory_objects[key] = storage_obj
+
+            self._completed_store_tasks[task_id] = success


If the success = False, do we want to update the self._memory_obj? Will this cause an incorrect lookup/load?

Yeah the logic here is a bit confused. Transfer errors and allocation failures are handled in the same way. Updated the logic here.

Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn>

KuntaiDu

LGTM

ApostaC

LGTM!

Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn>

* initial nixl support in mp Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * add tests Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * Update lmcache/v1/memory_management.py Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> * Update lmcache/v1/distributed/l2_adapters/nixl_store_l2_adapter.py Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> * Update lmcache/v1/distributed/l2_adapters/nixl_store_l2_adapter.py Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> * Update lmcache/v1/distributed/l2_adapters/nixl_store_l2_adapter.py Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> * fix misc Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * fix wrong mem allocator Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * not using paged allocator Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * fix tests Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * add init code Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * address several comments Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * add design doc Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * fix tests Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * use lazy import Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * remove get vm space Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> --------- Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>

* initial nixl support in mp Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * add tests Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * Update lmcache/v1/memory_management.py Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> * Update lmcache/v1/distributed/l2_adapters/nixl_store_l2_adapter.py Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> * Update lmcache/v1/distributed/l2_adapters/nixl_store_l2_adapter.py Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> * Update lmcache/v1/distributed/l2_adapters/nixl_store_l2_adapter.py Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> * fix misc Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * fix wrong mem allocator Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * not using paged allocator Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * fix tests Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * add init code Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * address several comments Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * add design doc Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * fix tests Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * use lazy import Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * remove get vm space Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> --------- Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> Signed-off-by: shaoxiawjc <wjc2800@163.com>

* initial nixl support in mp Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * add tests Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * Update lmcache/v1/memory_management.py Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> * Update lmcache/v1/distributed/l2_adapters/nixl_store_l2_adapter.py Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> * Update lmcache/v1/distributed/l2_adapters/nixl_store_l2_adapter.py Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> * Update lmcache/v1/distributed/l2_adapters/nixl_store_l2_adapter.py Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> * fix misc Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * fix wrong mem allocator Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * not using paged allocator Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * fix tests Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * add init code Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * address several comments Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * add design doc Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * fix tests Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * use lazy import Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * remove get vm space Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> --------- Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> Signed-off-by: Aaron Wu <aaron.wu@dell.com>

* initial nixl support in mp Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * add tests Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * Update lmcache/v1/memory_management.py Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> * Update lmcache/v1/distributed/l2_adapters/nixl_store_l2_adapter.py Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> * Update lmcache/v1/distributed/l2_adapters/nixl_store_l2_adapter.py Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> * Update lmcache/v1/distributed/l2_adapters/nixl_store_l2_adapter.py Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> * fix misc Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * fix wrong mem allocator Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * not using paged allocator Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * fix tests Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * add init code Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * address several comments Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * add design doc Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * fix tests Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * use lazy import Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> * remove get vm space Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> --------- Signed-off-by: YaoJiayi <120040070@link.cuhk.edu.cn> Signed-off-by: Jiayi Yao <82156730+YaoJiayi@users.noreply.github.com> Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>

initial nixl support in mp

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add tests

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Update lmcache/v1/memory_management.py

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fix misc

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Merge branch 'dev' into localdev/nixl-adapter

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fix wrong mem allocator

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not using paged allocator

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fix tests

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Merge branch 'dev' into localdev/nixl-adapter

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add init code

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address several comments

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Merge branch 'dev' into localdev/nixl-adapter

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use lazy import

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Merge branch 'dev' into localdev/nixl-adapter

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Merge branch 'dev' into localdev/nixl-adapter

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Comment thread lmcache/v1/distributed/memory_manager.py Outdated

remove get vm space

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YaoJiayi merged commit ecd69ea into dev Mar 6, 2026
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YaoJiayi deleted the localdev/nixl-adapter branch March 10, 2026 17:36

		for i, key in enumerate(keys):
		if (obj := self._memory_objects.get(key)) is None:

		self.nixl_agent.deregister_memory(self.mem_reg_descs)


		class NixlStoreL2Adapter(L2AdapterInterface):

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YaoJiayi commented Mar 2, 2026 •

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