ISA system architecture
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ISA system architecture
- Publication date
- 1995
- Topics
- bus, address, memory, data, microprocessor, isa, cache, interrupt, device, system, bus cycle, isa system, bus control, system architecture, control logic, data bus, memory address, isa bus, address bus, bus master, Computer architecture
- Publisher
- Reading, Mass. : Addison-Wesley Pub. Co.
- Collection
- folkscanomy_computer_inbox; folkscanomy_computer; folkscanomy
- Language
- English
- Item Size
- 168.4M
Rev. ed. of: EISA system architecture. 2nd ed. c1995
Includes index
Includes index
- Addeddate
- 2013-03-15 01:25:23
- Foldoutcount
- 0
- Identifier
- ISA_System_Architecture
- Identifier-ark
- ark:/13960/t9q25bc0f
- Isbn
- 0201409968
- Lccn
- 95163157
- Ocr
- ABBYY FineReader 8.0
- Ocr_converted
- abbyy-to-hocr 1.1.7
- Ocr_module_version
- 0.0.13
- Openlibrary
- OL876575M
- Openlibrary_edition
- OL876575M
- Openlibrary_work
- OL2724761W
- Page_number_confidence
- 100
- Page_number_module_version
- 1.0.5
- Pages
- 521
- Ppi
- 600
- Full catalog record
- MARCXML
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