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Microprocessor Articles
Page 40 of 42
Instruction type STAX rp in 8085 Microprocessor
In 8085 Instruction set, STAX is a mnemonic that stands for SToreAccumulator contents in memory pointed by eXtended register denoted as “rp”.Hererp stands for register pair. This instruction uses register indirect addressing for specifying the destination. So using this instruction, the current content of Accumulator will be written to the memory location as pointed by 16-bit address as stored in the register pair. It occupies only 1-Byte in memory. Mnemonics, Operand Opcode(in HEX) Bytes STAX B 02 1 STAX D 12 1 STAX B is an example instruction of this type. It ...
Read MoreInstruction type LHLD a16 in 8085 Microprocessor
In 8085 Instruction set LHLD is a mnemonic that stands for Load HL pair using Direct addressing from memory location whose 16-bit address is denoted as a16. So the previous content of HL register pair will get updated with the new 16-bits value. As HL pair has to be updated, so data comes from two consecutive memory locations starting at the address a16 and also from next address location. This instruction uses absolute addressing mode for specifying the data in the instruction. It occupies 3-Bytes in the memory. Mnemonics, Operand Opcode(in HEX) Bytes LHLD Address 2A ...
Read MoreInstruction type SHLD a16 in 8085 Microprocessor
In 8085 Instruction set, SHLD is a mnemonic, which stands for Store HLpair using Direct addressing in memory location whose 16-bit address is denoted as a16. As HL pair has to be stored, so it has to be stored in two consecutive locations starting at the address a16. We know that H and L are 8-bit registers. So their contents will be stored in two consecutive memory locations as each memory location can hold 8-bits of data. This instruction uses absolute addressing mode for specifying the destination. It occupies 3-Bytes in the memory. Mnemonics, Operand Opcode(in HEX) Bytes ...
Read MoreInstruction type ADD R in 8085 Microprocessor
In 8085 Instruction set, ADD R is a mnemonic that stands for “Add contents of R to Accumulator”. As addition is a binary operation, so it requires two operands to be operated on. So input operands will reside on Accumulator and R registers and after addition the result will be stored back on to Accumulator. In this case, “R” stands for any of the following registers or memory location M pointed by HL pair. R = A, B, C, D, E, H, L, or M It is 1-Byte instruction so occupies only 1-Byte in memory. As R can ...
Read MoreInstruction type INR R in 8085 Microprocessor
In 8085 Instruction set, INR is a mnemonic that stands for ‘INcRement’ and ‘R’ stands for any of the following registers or memory location M pointed by HL pair. R = A, B, C, D, E, H, L, or M This instruction is used to add 1 with the contents of R. So the previous value in R will get increased by amount 1 only. The result of increment will be stored in R updating its previous content. All flags, except Cy flag, are affected depending on the result thus produced. In different assembly language core, this instruction ...
Read MoreInstruction type ACI d8 in 8085 Microprocessor
In 8085 Instruction set, ACI is a mnemonic which stands for 'Add with Carry Immediate to Accumulator' and here “d8” stands for any 8-bit or 1-Bytedata. This instruction is actually meant for adding one 8-bit immediate data or operand to the Accumulator along with the carry value. The result of the addition will be stored in the Accumulator itself and replacing initial value of the Accumulator. As it is an arithmetic instruction, so the flags are affected based on the result. It holds 2-Bytes in the memory. Mnemonics, Operand Opcode(in HEX) Bytes ACI Data CE 2 ...
Read MoreInstruction type ADC R in 8085 Microprocessor
In 8085 assembly language coding, sometimes there is a requirement to add two numbers and where each of these numbers are having several Bytes in size. As example, let us add the following two 16-bit numbers. 1 10 50H A0 F1H ------ B1 01H In this example, the addition of 50H and F1H results in a sum of 01H with a carry of 1. Now, we are supposed to add 10H and A0H along with this carry of 1. To carry out ...
Read MoreInstruction type INX rp in 8085 Microprocessor
In 8085 Instruction set, INX is a mnemonic that stands for “INcrementeXtended register” and rp stands for register pair. And it can be any one of the following register pairs. rp = BC, DE, or HL This instruction will be used to add 1 to the present content of the rp. And thus the result of the incremented content will remain stored in rp itself. Though it is an arithmetic instruction, note that, flag bits are not at all affected by the execution of this instruction. A register pair is generally used to store 16-bit memory address. If ...
Read MoreInstruction type SUB R in 8085 Microprocessor
In 8085 Instruction, SUB is a mnemonic that stands for ‘SUBtract contents of R from Accumulator. Here R stands for any of the following registers, or memory location M pointed by HL pair. R = A, B, C, D, E, H, L, or M Mnemonics, Operand Opcode(in HEX) Bytes SUB A 97 1 SUB B 90 1 SUB C 91 1 SUB D 92 1 SUB E 93 1 SUB H 94 1 SUB L 95 1 SUB M ...
Read MoreInstruction type SUI d8 in 8085 Microprocessor
In 8085 Instruction set, SUI is a mnemonic that stands for ‘SUbtract Immediate from Accumulator and here d8 stands for any 8-bit or 1-Byte data. This instruction is used to subtract 8-bit immediate data from the Accumulator. The result of the subtraction will be stored in the Accumulator over witting its previous content. As it is an arithmetic instruction, so flag bits are affected based on the result. It is a 2-Byte instruction and occupies 2-Bytes in memory. Mnemonics, Operand Opcode(in HEX) Bytes SUI Data D6 2 When we issue SUI d8 instruction then ...
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