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Differences between Data paths.
A CPU has two main sections: the data section (data path) and the control section. The data path consists of registers, ALU, and interconnection buses that carry out the actual data processing. Data paths are classified into three types based on how instructions are executed − Single Cycle, Multiple Cycle, and Pipeline.
Single Cycle Data Path
In a single cycle data path, each instruction completes in exactly one clock cycle. The clock cycle must be long enough to accommodate the slowest instruction, which wastes time for simpler instructions.
Multiple Cycle Data Path
In a multiple cycle data path, each instruction is broken into multiple steps, with each step taking one (shorter) clock cycle. Different instructions can take different numbers of cycles, but only one instruction executes at a time.
Pipeline Data Path
In a pipeline data path, the instruction execution is divided into fixed stages (e.g., Fetch, Decode, Execute, Memory, Write-back). Multiple instructions can be in different stages simultaneously, overlapping execution for higher throughput.
Key Differences
| Feature | Single Cycle | Multiple Cycle | Pipeline |
|---|---|---|---|
| CPI | 1 (fixed) | Variable per instruction | ~1 (ideally, after pipeline fills) |
| Instruction Steps | Not divided | Divided into arbitrary steps | One step per pipeline stage |
| Concurrent Execution | One at a time | One at a time | Multiple (overlapping stages) |
| Extra Registers | Not needed | Required | Required (pipeline registers) |
| Clock Cycle Time | Long | Short | Short |
| Overlapping | No | No | Yes |
Conclusion
Single cycle is the simplest but wastes time on short instructions. Multiple cycle improves efficiency with shorter clock cycles but still processes one instruction at a time. Pipeline achieves the highest throughput by overlapping multiple instructions in different stages simultaneously.
