Stockfish Testing Queue

Cores

1991

Nodes / sec

1293M

Games / min

1146

Time remaining

52.5h

Workers - 154 machines

Pending approval - 0 tests

No tests pending approval

Paused - 12 tests

26-01-04 sg
tweak_lmr_scale_a2 diff
  
  
    LLR: -1.39 (-2.94,2.94) <0.00,2.00>
      
Total: 152384 W: 39065 L: 38964 D: 74355
Ptnml(0-2): 448, 18023, 39152, 18118, 451
sprt @ 10+0.1 th 1
cores: 0 (0)
Use following depth dependent reduction factor: r * depth / (depth * depth + 2).
26-01-04 sg
tweak_lmr_scale_a4 diff
  
  
    LLR: -1.31 (-2.94,2.94) <0.00,2.00>
      
Total: 162272 W: 41781 L: 41658 D: 78833
Ptnml(0-2): 520, 19120, 41725, 19259, 512
sprt @ 10+0.1 th 1
cores: 0 (0)
Use following depth dependent reduction factor: r * depth / (depth * depth + 4).
26-01-04 sg
tweak_lmr_scale_a5 diff
  
  
    LLR: -0.53 (-2.94,2.94) <0.00,2.00>
      
Total: 90720 W: 23338 L: 23252 D: 44130
Ptnml(0-2): 233, 10739, 23369, 10747, 272
sprt @ 10+0.1 th 1
cores: 0 (0)
Use following depth dependent reduction factor: r * (depth + 1) / (depth * depth + 3).
26-01-04 sg
tweak_lmr_scale_a6 diff
  
  
    LLR: -1.97 (-2.94,2.94) <0.00,2.00>
      
Total: 131072 W: 33725 L: 33707 D: 63640
Ptnml(0-2): 411, 15433, 33759, 15593, 340
sprt @ 10+0.1 th 1
cores: 0 (0)
Use following depth dependent reduction factor: r * depth / (depth * depth + 5).
26-01-15 sg
tt_stm3 diff
  
  
    LLR: -1.19 (-2.94,2.94) <-1.75,0.25>
      
Total: 22784 W: 5861 L: 5991 D: 10932
Ptnml(0-2): 72, 2717, 5934, 2607, 62
sprt @ 10+0.1 th 1
cores: 0 (0)
Test first as non-regression for default hash setting. Try an alternative and probably faster implementation of hash collision problem with opposite positions. The side to move information is now maintained in the lowest bit in the position key by modifing the zobrist keys directly. The side key has as lowest bit a 1 and for all other keys the lowest bit is set zero (all other zobrist key bits are the same as master)- Also to avoid a endless loop during generation of the cuckoo table the both hash function have be changed not to use the lowest bit because it will now everytime 1. In the pawn_key function then only the rule50 adjusting have to be shift 1 bit up to not effect the lowest bit of the key.
26-01-16 sg
tuned_lmr_conditions2c diff
  
  
    LLR: -2.02 (-2.94,2.94) <0.00,2.00>
      
Total: 24128 W: 6148 L: 6291 D: 11689
Ptnml(0-2): 61, 2910, 6281, 2735, 77
sprt @ 10+0.1 th 1
cores: 0 (0)
Double effect: After 92k LTC lmr conditions tuning test most significant negative param A[0][1][2] but use opposite precondition ttPv (the original precondition failed and allowing both struggles but seem at least neutral).
26-01-14 Dan
cm_mc_b_2 diff
  
  
    LLR: -2.05 (-2.94,2.94) <0.00,2.00>
      
Total: 150528 W: 38784 L: 38745 D: 72999
Ptnml(0-2): 459, 17768, 38794, 17761, 482
sprt @ 10+0.1 th 1
cores: 0 (0)
take 2
26-01-15 sni
style^ diff
  
  
    LLR: -1.14 (-2.94,2.94) <0.00,2.00>
      
Total: 68000 W: 17431 L: 17432 D: 33137
Ptnml(0-2): 193, 8170, 17315, 8089, 233
sprt @ 10+0.1 th 1
cores: 0 (0)
Kortchnoi style = 3 when simple*nnue < 0
26-01-16 sni
style diff
  
  
    LLR: -1.07 (-2.94,2.94) <0.00,2.00>
      
Total: 32768 W: 8340 L: 8387 D: 16041
Ptnml(0-2): 127, 3869, 8407, 3886, 95
sprt @ 10+0.1 th 1
cores: 0 (0)
Korchnoi when simple*nnue<0, Tal when simple*nnue>0
26-01-05 0x5
exp-gbquietsort diff
  
  
    LLR: -1.71 (-2.94,2.94) <-1.75,0.25>
      
Total: 80064 W: 20503 L: 20744 D: 38817
Ptnml(0-2): 244, 9679, 20461, 9370, 278
sprt @ 10+0.1 th 1
cores: 0 (0)
don't sort bad quiets fixed
26-01-05 0x5
exp-gbquietsort diff
  
  
    LLR: 2.37 (-2.94,2.94) <-1.75,0.25>
      
Total: 128480 W: 33207 L: 33138 D: 62135
Ptnml(0-2): 421, 15097, 33133, 15170, 419
sprt @ 10+0.1 th 1
cores: 0 (0)
consider anything we sort as good
26-01-13 pb0
retro diff
  
  
    LLR: 0.08 (-2.94,2.94) <-1.75,0.25>
      
Total: 22032 W: 5551 L: 5567 D: 10914
Ptnml(0-2): 9, 2421, 6176, 2397, 13
sprt @ 60+0.6 th 1
cores: 0 (0)
LTC: Take 2: version 2 of a robust retrograde analysis feature. More clean implemented than take 1 and less invasive for the main search. Curious the see if this regresses at normal game play. P.S.: Stopped because just detected it obeys no more nodes limit (so bugged version)

Failed - 0 tests

No failed tests on this page

Active - 34 tests

26-01-14 jay
imp2 diff
  
  
    LLR: 1.89 (-2.94,2.94) <0.00,2.00>
      
Total: 518944 W: 134265 L: 133333 D: 251346
Ptnml(0-2): 1568, 61126, 133203, 61956, 1619
sprt @ 10+0.1 th 1
cores: 112 (7)
qsearch: lower futilityBase when improving
26-01-18 fau
antid2 diff
  
  
    LLR: 1.28 (-2.94,2.94) <0.00,2.00>
      
Total: 13440 W: 3515 L: 3382 D: 6543
Ptnml(0-2): 32, 1541, 3456, 1644, 47
sprt @ 10+0.1 th 1
cores: 22 (3)
antid2
26-01-18 kev
probcut-reduction diff
  
  
    LLR: 1.01 (-2.94,2.94) <0.00,2.00>
      
Total: 42560 W: 11177 L: 11023 D: 20360
Ptnml(0-2): 118, 5092, 10727, 5204, 139
sprt @ 10+0.1 th 1
cores: 48 (6)
Reduce when probcut fails without a tt entry
26-01-18 jay
remove-prefetch-do_move diff
  
  
    LLR: 0.58 (-2.94,2.94) <-1.75,0.25>
      
Total: 20552 W: 5267 L: 5239 D: 10046
Ptnml(0-2): 32, 2350, 5477, 2392, 25
sprt @ 5+0.05 th 8
cores: 107 (5)
Non regression SMP test with a larger hash size.
26-01-18 fau
toor3 diff
  
  
    LLR: 0.53 (-2.94,2.94) <0.00,2.00>
      
Total: 8640 W: 2215 L: 2156 D: 4269
Ptnml(0-2): 18, 995, 2240, 1044, 23
sprt @ 10+0.1 th 1
cores: 16 (2)
toor3
26-01-18 Dan
32_b_keys diff
  
  
    LLR: 0.25 (-2.94,2.94) <0.00,2.00>
      
Total: 18176 W: 4782 L: 4732 D: 8662
Ptnml(0-2): 62, 2180, 4551, 2236, 59
sprt @ 10+0.1 th 1
cores: 31 (5)
try 32 bit keys
26-01-18 fau
antid3 diff
  
  
    LLR: 0.23 (-2.94,2.94) <0.00,2.00>
      
Total: 10432 W: 2767 L: 2731 D: 4934
Ptnml(0-2): 28, 1230, 2659, 1276, 23
sprt @ 10+0.1 th 1
cores: 13 (4)
antid3
26-01-14 Viz
prbShortcut1 diff
  
  
    LLR: 0.23 (-2.94,2.94) <0.00,2.00>
      
Total: 189728 W: 49071 L: 48772 D: 91885
Ptnml(0-2): 533, 22368, 48824, 22545, 594
sprt @ 10+0.1 th 1
cores: 20 (3)
Take 1
26-01-18 fau
antid1 diff
  
  
    LLR: 0.12 (-2.94,2.94) <0.00,2.00>
      
Total: 10848 W: 2787 L: 2761 D: 5300
Ptnml(0-2): 31, 1248, 2842, 1270, 33
sprt @ 10+0.1 th 1
cores: 19 (3)
antid1
26-01-17 sg
tuned_lmr_conditions2 diff
  
  
    LLR: 0.10 (-2.94,2.94) <0.50,2.50>
      
Total: 35490 W: 8993 L: 8913 D: 17584
Ptnml(0-2): 11, 3848, 9954, 3914, 18
sprt @ 60+0.6 th 1
cores: 70 (6)
LTC: [Rebased] After 92k LTC lmr conditions tuning test most significant negative param A[0][1][2] (because less reduction scales good at ttPv nodes skip this condition).
26-01-18 Viz
longImpr2 diff
  
  
    LLR: -0.04 (-2.94,2.94) <0.00,2.00>
      
Total: 1600 W: 415 L: 416 D: 769
Ptnml(0-2): 3, 201, 394, 198, 4
sprt @ 10+0.1 th 1
cores: 16 (2)
Take 2
26-01-16 sg
tuned_lmr_conditions2b diff
  
  
    LLR: -0.10 (-2.94,2.94) <0.00,2.00>
      
Total: 110208 W: 28604 L: 28450 D: 53154
Ptnml(0-2): 332, 13013, 28304, 13079, 376
sprt @ 10+0.1 th 1
cores: 16 (2)
After 92k LTC lmr conditions tuning test most significant negative param A[0][1][2] but use opposite precondition ttPv (the original precondition failed and allowing both struggles but seem at least neutral).
26-01-17 sg
tuned_lmr_conditions2a diff
  
  
    LLR: -0.17 (-2.94,2.94) <0.50,2.50>
      
Total: 13146 W: 3321 L: 3308 D: 6517
Ptnml(0-2): 2, 1415, 3733, 1414, 9
sprt @ 60+0.6 th 1
cores: 31 (6)
LTC: STC failed but as values were tuned at LTC try this now (TP 50%). After 92k LTC lmr conditions tuning test most significant negative param A[0][1][2].
26-01-18 Viz
longImpr1 diff
  
  
    LLR: -0.26 (-2.94,2.94) <0.00,2.00>
      
Total: 1664 W: 421 L: 441 D: 802
Ptnml(0-2): 7, 197, 440, 185, 3
sprt @ 10+0.1 th 1
cores: 16 (2)
Take 1
26-01-16 sni
style diff
  
  
    LLR: -0.27 (-2.94,2.94) <0.00,2.00>
      
Total: 100736 W: 25901 L: 25777 D: 49058
Ptnml(0-2): 285, 11847, 26020, 11891, 325
sprt @ 10+0.1 th 1
cores: 27 (4)
take 3
26-01-14 Viz
seerYoink2 diff
  
  
    LLR: -0.28 (-2.94,2.94) <0.00,2.00>
      
Total: 192576 W: 49921 L: 49664 D: 92991
Ptnml(0-2): 538, 22516, 49947, 22725, 562
sprt @ 10+0.1 th 1
cores: 22 (3)
Take 2
26-01-15 sni
style diff
  
  
    LLR: -0.34 (-2.94,2.94) <0.00,2.00>
      
Total: 120288 W: 31170 L: 31023 D: 58095
Ptnml(0-2): 368, 14233, 30806, 14358, 379
sprt @ 10+0.1 th 1
cores: 22 (4)
Tal style = 1 when simple*nnue > 0
26-01-16 Dan
smaller_si diff
  
  
    LLR: -0.41 (-2.94,2.94) <0.00,2.00>
      
Total: 116544 W: 30004 L: 29874 D: 56666
Ptnml(0-2): 311, 12870, 31798, 12964, 329
sprt @ 10+0.1 th 1
cores: 24 (4)
speedup = +0.0021, P(speedup > 0) = 0.9744, i7-8750H
26-01-18 fau
toor3a diff
  
  
    LLR: -0.82 (-2.94,2.94) <0.00,2.00>
      
Total: 11296 W: 2856 L: 2912 D: 5528
Ptnml(0-2): 33, 1348, 2934, 1308, 25
sprt @ 10+0.1 th 1
cores: 16 (2)
toor3a
26-01-18 fau
toor3b diff
  
  
    LLR: -0.83 (-2.94,2.94) <0.00,2.00>
      
Total: 10528 W: 2721 L: 2780 D: 5027
Ptnml(0-2): 40, 1275, 2692, 1218, 39
sprt @ 10+0.1 th 1
cores: 18 (1)
toor3b
26-01-15 sg
tt_stm2 diff
  
  
    LLR: -0.84 (-2.94,2.94) <0.00,2.00>
      
Total: 131040 W: 33457 L: 33344 D: 64239
Ptnml(0-2): 156, 14858, 35393, 14943, 170
sprt @ 5+0.05 th 8
cores: 48 (5)
STC gainer test with hash pressure struggles. So try STC SMP with hash pressure (4 MB) because theoretically the should be more collision because of the overlapping search of the different threads. Shift position key one bit up and replace lowest bit with side to move. So white and black side to move positions never matches as hit in TT.
26-01-15 sni
style^ diff
  
  
    LLR: -0.86 (-2.94,2.94) <0.00,2.00>
      
Total: 152960 W: 39495 L: 39346 D: 74119
Ptnml(0-2): 477, 18101, 39192, 18216, 494
sprt @ 10+0.1 th 1
cores: 25 (4)
Tal style = 3 when simple*nnue > 0
26-01-17 sni
style diff
  
  
    LLR: -0.92 (-2.94,2.94) <0.00,2.00>
      
Total: 63616 W: 16432 L: 16420 D: 30764
Ptnml(0-2): 199, 7528, 16335, 7554, 192
sprt @ 10+0.1 th 1
cores: 24 (3)
Tal style = 1 when simple*nnue < 0
26-01-12 sg
tt_stm2 diff
  
  
    LLR: -1.11 (-2.94,2.94) <0.00,2.00>
      
Total: 333504 W: 85646 L: 85253 D: 162605
Ptnml(0-2): 1041, 39328, 85665, 39633, 1085
sprt @ 10+0.1 th 1
cores: 32 (4)
With normal hash pressure this change seems to have not much effect. So try with hash pressure (1 MB). Shift position key one bit up and replace lowest bit with side to move. So white and black side to move positions never matches as hit in TT.
26-01-12 Viz
pvLmrDeeS1 diff
  
  
    LLR: -1.13 (-2.94,2.94) <0.50,2.50>
      
Total: 53632 W: 13786 L: 13771 D: 26075
Ptnml(0-2): 7, 4880, 17026, 4897, 6
sprt @ 60+0.6 th 8
cores: 195 (14)
LTC: ??
26-01-17 Viz
seerYoink3 diff
  
  
    LLR: -1.81 (-2.94,2.94) <0.00,2.00>
      
Total: 59008 W: 15152 L: 15225 D: 28631
Ptnml(0-2): 153, 6985, 15315, 6884, 167
sprt @ 10+0.1 th 1
cores: 18 (3)
Take 3
26-01-15 sg
tt_stm2 diff
  
  
    LLR: -1.84 (-2.94,2.94) <0.00,2.00>
      
Total: 50682 W: 12877 L: 12959 D: 24846
Ptnml(0-2): 36, 5527, 14278, 5483, 17
sprt @ 60+0.6 th 1
cores: 36 (6)
LTC: Regression tests with default hash passed and LTC with even around 1.76 elo. The hash pressure tests at low TC (singel and SMP) seems not good. So retest the non-regression lTC as LTC gainer with STC bounds and try the VVLTC route. Shift position key one bit up and replace lowest bit with side to move. So white and black side to move positions never match as hit in TT.
26-01-16 Dan
stat_ld_ph_1 diff
  
  
    LLR: -2.36 (-2.94,2.94) <0.00,2.00>
      
Total: 141664 W: 36458 L: 36459 D: 68747
Ptnml(0-2): 439, 16765, 36410, 16794, 424
sprt @ 10+0.1 th 1
cores: 24 (3)
take 1
26-01-16 vdv
master diff
  
  
    Elo: 46.32 ± 1.4 (95%) LOS: 100.0%
      
Total: 53318 W: 17477 L: 10410 D: 25431
Ptnml(0-2): 16, 2739, 14237, 9496, 171
nElo: 100.88 ± 3.2 (95%) PairsRatio: 3.51
60000 @ 60+0.6 th 1
cores: 78 (5)
Progression test of "update the WDL model" of Jan 15 vs SF_17.
26-01-16 vdv
master diff
  
  
    Elo: 29.61 ± 1.3 (95%) LOS: 100.0%
      
Total: 52744 W: 16690 L: 12206 D: 23848
Ptnml(0-2): 0, 3076, 15736, 7560, 0
nElo: 68.27 ± 3.1 (95%) PairsRatio: 2.46
60000 @ 60+0.6 th 1
cores: 99 (9)
Endgames Progression test of "update the WDL model" of Jan 15 vs SF_17.
26-01-16 vdv
master diff
  
  
    Elo: 58.27 ± 1.5 (95%) LOS: 100.0%
      
Total: 49592 W: 15833 L: 7593 D: 26166
Ptnml(0-2): 37, 2525, 11802, 10025, 407
nElo: 119.43 ± 3.4 (95%) PairsRatio: 4.07
60000 @ 60+0.6 th 1
cores: 104 (7)
DFRC Progression test of "update the WDL model" of Jan 15 vs SF_17.
26-01-16 vdv
master diff
  
  
    Elo: 43.69 ± 1.3 (95%) LOS: 100.0%
      
Total: 47804 W: 15699 L: 9719 D: 22386
Ptnml(0-2): 1, 1869, 14227, 7759, 46
nElo: 104.18 ± 3.3 (95%) PairsRatio: 4.17
60000 @ 60+0.6 th 8
cores: 557 (8)
SMP Progression test of "update the WDL model" of Jan 15 vs SF_17.
26-01-16 fau
prova diff
  
  
    20834/150000 iterations
      
41668/300000 games played
300000 @ 60+0.6 th 1
cores: 34 (4)
prova - this should fix the "Infinite Extension" bug
26-01-17 Dan
cm_mc_b_1_tune diff
  
  
    7547/30000 iterations
      
15094/60000 games played
60000 @ 60+0.6 th 1
cores: 51 (5)
merge

Finished - 180146 tests

26-01-18 max feature/lazy-pawn-value diff
  
  
    LLR: -2.95 (-2.94,2.94) <0.00,2.00>
      
Total: 11120 W: 2725 L: 2960 D: 5435
Ptnml(0-2): 22, 1362, 3020, 1141, 15
sprt @ 5+0.05 th 8 Add lazy value cache for pawn history reads Per-thread 4096-entry cache stores individual (pawnKey, pc, to) -> value mappings instead of copying entire 2KB entries. Each entry is 16 bytes (8 byte key + 3 byte pc/to + 2 byte value), total ~64KB fits in L1 cache. Uses lambda for lazy evaluation - atomic read from shared L1 only happens on cache miss. On cache hit, returns cached value (non-atomic, fast). Targets atomic READ contention in movepick (the actual bottleneck).
26-01-18 max feature/l0-pawn-cache-e diff
  
  
    LLR: -2.94 (-2.94,2.94) <0.00,2.00>
      
Total: 20512 W: 5104 L: 5324 D: 10084
Ptnml(0-2): 36, 2419, 5546, 2239, 16
sprt @ 5+0.05 th 8 L0 pawn history cache for reduced atomic contention at high thread counts
26-01-18 kev probcut-depth diff
  
  
    LLR: -2.94 (-2.94,2.94) <0.00,2.00>
      
Total: 26400 W: 6782 L: 7005 D: 12613
Ptnml(0-2): 98, 3225, 6751, 3054, 72
sprt @ 10+0.1 th 1 Reduce more in probcut based on our current depth
26-01-18 Dan loc_corr_2 diff
  
  
    LLR: -1.10 (-2.94,2.94) <0.00,2.00>
      
Total: 3736 W: 924 L: 1011 D: 1801
Ptnml(0-2): 4, 465, 1016, 380, 3
sprt @ 5+0.05 th 8 try different linear combination
26-01-16 lem gcc-inline-100 diff
  
  
    LLR: -1.95 (-2.94,2.94) <0.00,2.00>
      
Total: 124800 W: 32165 L: 32155 D: 60480
Ptnml(0-2): 350, 13805, 34130, 13715, 400
sprt @ 10+0.1 th 1 Positive results when raising inline limit for clang. See if same magic happens on GCC.
26-01-15 fau antid diff
  
  
    29253/100000 iterations
      
58506/200000 games played
200000 @ 60+0.6 th 1 antid
26-01-17 Dan loc_corr diff
  
  
    LLR: -2.95 (-2.94,2.94) <0.00,2.00>
      
Total: 14904 W: 3730 L: 3958 D: 7216
Ptnml(0-2): 19, 1799, 4043, 1573, 18
sprt @ 5+0.05 th 8 try average local corrhists with shared corrhists
26-01-16 lem gcc-inline-200 diff
  
  
    LLR: -2.93 (-2.94,2.94) <0.00,2.00>
      
Total: 114816 W: 29335 L: 29423 D: 56058
Ptnml(0-2): 337, 12678, 31462, 12598, 333
sprt @ 10+0.1 th 1 Positive results when raising inline limit for clang. See if same magic happens on GCC.
26-01-14 Fis GCCProfile diff
  
  
    LLR: -3.24 (-2.94,2.94) <0.00,2.00>
      
Total: 297952 W: 76789 L: 76643 D: 144520
Ptnml(0-2): 883, 32949, 81178, 33071, 895
sprt @ 10+0.1 th 1 Extra profile directives for GCC Inspired by https://tests.stockfishchess.org/tests/view/696667bdd5a3b5895b50f3f2
26-01-18 max feature/twolevel-pawn-h diff
  
  
    LLR: -0.26 (-2.94,2.94) <0.00,2.00>
      
Total: 384 W: 87 L: 110 D: 187
Ptnml(0-2): 0, 60, 97, 33, 2
sprt @ 10+0.1 th 1 Adaptive L0 pawn history cache size based on thread count L0 cache scales with thread count: 512 * numThreads, capped at 8192 (full size). This reduces evictions and L1 atomic accesses at higher thread counts. At 16+ threads each worker gets a full-size L0 cache, minimizing shared L1 contention. Single-thread mode bypasses L0/L1 entirely, using a dedicated non-atomic table.
26-01-16 ane split-ttmovehist diff
  
  
    LLR: -0.74 (-2.94,2.94) <0.00,2.00>
      
Total: 141344 W: 36245 L: 36103 D: 68996
Ptnml(0-2): 463, 16641, 36266, 16895, 407
sprt @ 10+0.1 th 1 Take 2, try adjusting bonus values to compensate for splitting
26-01-17 max feature/embedded-tableb diff
  
  
    LLR: -2.99 (-2.94,2.94) <0.00,2.00>
      
Total: 6784 W: 1665 L: 1920 D: 3199
Ptnml(0-2): 43, 861, 1816, 652, 20
sprt @ 10+0.1 th 1 Embedded O(1) compressed 3-4 piece tablebases
26-01-12 Viz lesserYoink7 diff
  
  
    LLR: -2.94 (-2.94,2.94) <0.00,2.00>
      
Total: 293056 W: 75358 L: 75193 D: 142505
Ptnml(0-2): 792, 32744, 79323, 32845, 824
sprt @ 10+0.1 th 1 Take 7
26-01-17 jay remove-givescheck-param diff
  
  
    LLR: -0.43 (-2.94,2.94) <-1.75,0.25>
      
Total: 44448 W: 11379 L: 11463 D: 21606
Ptnml(0-2): 117, 4973, 12138, 4869, 127
sprt @ 10+0.1 th 1 remove the givesCheck param in do_move get rid of a few vars
26-01-16 jay qsearch-ttmove diff
  
  
    LLR: -1.83 (-2.94,2.94) <0.00,2.00>
      
Total: 110624 W: 28608 L: 28608 D: 53408
Ptnml(0-2): 368, 12988, 28591, 13006, 359
sprt @ 10+0.1 th 1 qsearch: exclude tt from pruning
26-01-17 fau toor2a diff
  
  
    LLR: -1.40 (-2.94,2.94) <0.00,2.00>
      
Total: 22592 W: 5814 L: 5906 D: 10872
Ptnml(0-2): 70, 2757, 5739, 2655, 75
sprt @ 10+0.1 th 1 toor2a
26-01-17 max feature/pawn-history-la diff
  
  
    LLR: -0.01 (-2.94,2.94) <-1.75,0.25>
      
Total: 1408 W: 371 L: 373 D: 664
Ptnml(0-2): 3, 162, 377, 158, 4
sprt @ 10+0.1 th 1 Thread-local pawn history with large page allocation (2MB per thread, 1024 buckets)
26-01-17 fau toor2 diff
  
  
    LLR: -2.45 (-2.94,2.94) <0.00,2.00>
      
Total: 29632 W: 7541 L: 7715 D: 14376
Ptnml(0-2): 98, 3587, 7609, 3435, 87
sprt @ 10+0.1 th 1 toor2
26-01-17 fau toor1 diff
  
  
    LLR: -2.95 (-2.94,2.94) <0.00,2.00>
      
Total: 22304 W: 5590 L: 5818 D: 10896
Ptnml(0-2): 75, 2734, 5731, 2568, 44
sprt @ 10+0.1 th 1 toor1
26-01-11 max feature/qsearch-repetit diff
  
  
    LLR: -0.82 (-2.94,2.94) <-1.75,0.25>
      
Total: 190758 W: 48629 L: 48890 D: 93239
Ptnml(0-2): 109, 20881, 53637, 20666, 86
sprt @ 60+0.6 th 1 LTC: Qsearch repetition guard simplification
26-01-17 fau toor diff
  
  
    LLR: -2.93 (-2.94,2.94) <0.00,2.00>
      
Total: 20672 W: 5232 L: 5464 D: 9976
Ptnml(0-2): 72, 2577, 5264, 2357, 66
sprt @ 10+0.1 th 1 toor
26-01-16 max feature/lowply-simplify diff
  
  
    LLR: -0.04 (-2.94,2.94) <-1.75,0.25>
      
Total: 67680 W: 17358 L: 17436 D: 32886
Ptnml(0-2): 210, 8067, 17338, 8041, 184
sprt @ 10+0.1 th 1 Low ply history simplification
26-01-14 Viz prbShortcut3 diff
  
  
    LLR: -2.94 (-2.94,2.94) <0.00,2.00>
      
Total: 91744 W: 23505 L: 23631 D: 44608
Ptnml(0-2): 263, 10951, 23553, 10859, 246
sprt @ 10+0.1 th 1 Take 3
26-01-15 lem raise-inline-threshold diff
  
  
    LLR: 2.97 (-2.94,2.94) <-1.75,0.25>
      
Total: 128224 W: 33008 L: 32894 D: 62322
Ptnml(0-2): 258, 13572, 36305, 13752, 225
sprt @ 10+0.1 th 1 Try https://tests.stockfishchess.org/tests/view/696884a56d118e46e1731473 on apple silicon
26-01-17 sni style diff
  
  
    LLR: -2.42 (-2.94,2.94) <0.00,2.00>
      
Total: 15168 W: 3855 L: 4051 D: 7262
Ptnml(0-2): 73, 1886, 3835, 1744, 46
sprt @ 10+0.1 th 1 Tal style = 5