Stockfish Testing Queue
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1991
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Show Paused - 12 tests
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26-01-04 | sg |
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tweak_lmr_scale_a2 | diff |
LLR: -1.39 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 0 (0)
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Use following depth dependent reduction factor: r * depth / (depth * depth + 2). |
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26-01-04 | sg |
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tweak_lmr_scale_a4 | diff |
LLR: -1.31 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 0 (0)
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Use following depth dependent reduction factor: r * depth / (depth * depth + 4). |
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26-01-04 | sg |
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tweak_lmr_scale_a5 | diff |
LLR: -0.53 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 0 (0)
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Use following depth dependent reduction factor: r * (depth + 1) / (depth * depth + 3). |
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26-01-04 | sg |
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tweak_lmr_scale_a6 | diff |
LLR: -1.97 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 0 (0)
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Use following depth dependent reduction factor: r * depth / (depth * depth + 5). |
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26-01-15 | sg |
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tt_stm3 | diff |
LLR: -1.19 (-2.94,2.94) <-1.75,0.25>
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sprt
@ 10+0.1 th 1
cores: 0 (0)
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Test first as non-regression for default hash setting. Try an alternative and probably faster implementation of hash collision problem with opposite positions. The side to move information is now maintained in the lowest bit in the position key by modifing the zobrist keys directly. The side key has as lowest bit a 1 and for all other keys the lowest bit is set zero (all other zobrist key bits are the same as master)- Also to avoid a endless loop during generation of the cuckoo table the both hash function have be changed not to use the lowest bit because it will now everytime 1. In the pawn_key function then only the rule50 adjusting have to be shift 1 bit up to not effect the lowest bit of the key. |
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26-01-16 | sg |
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tuned_lmr_conditions2c | diff |
LLR: -2.02 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 0 (0)
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Double effect: After 92k LTC lmr conditions tuning test most significant negative param A[0][1][2] but use opposite precondition ttPv (the original precondition failed and allowing both struggles but seem at least neutral). |
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26-01-14 | Dan |
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cm_mc_b_2 | diff |
LLR: -2.05 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 0 (0)
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take 2 |
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26-01-15 | sni |
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style^ | diff |
LLR: -1.14 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 0 (0)
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Kortchnoi style = 3 when simple*nnue < 0 |
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26-01-16 | sni |
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style | diff |
LLR: -1.07 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 0 (0)
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Korchnoi when simple*nnue<0, Tal when simple*nnue>0 |
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26-01-05 | 0x5 |
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exp-gbquietsort | diff |
LLR: -1.71 (-2.94,2.94) <-1.75,0.25>
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sprt
@ 10+0.1 th 1
cores: 0 (0)
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don't sort bad quiets fixed |
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26-01-05 | 0x5 |
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exp-gbquietsort | diff |
LLR: 2.37 (-2.94,2.94) <-1.75,0.25>
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sprt
@ 10+0.1 th 1
cores: 0 (0)
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consider anything we sort as good |
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26-01-13 | pb0 |
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retro | diff |
LLR: 0.08 (-2.94,2.94) <-1.75,0.25>
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sprt
@ 60+0.6 th 1
cores: 0 (0)
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LTC: Take 2: version 2 of a robust retrograde analysis feature. More clean implemented than take 1 and less invasive for the main search. Curious the see if this regresses at normal game play. P.S.: Stopped because just detected it obeys no more nodes limit (so bugged version) |
Show Failed - 0 tests
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Show Active - 34 tests
| 26-01-14 | jay |
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imp2 | diff |
LLR: 1.89 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 112 (7)
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qsearch: lower futilityBase when improving |
| 26-01-18 | fau |
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antid2 | diff |
LLR: 1.28 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 22 (3)
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antid2 |
| 26-01-18 | kev |
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probcut-reduction | diff |
LLR: 1.01 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 48 (6)
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Reduce when probcut fails without a tt entry |
| 26-01-18 | jay |
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remove-prefetch-do_move | diff |
LLR: 0.58 (-2.94,2.94) <-1.75,0.25>
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sprt
@ 5+0.05 th 8
cores: 107 (5)
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Non regression SMP test with a larger hash size. |
| 26-01-18 | fau |
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toor3 | diff |
LLR: 0.53 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 16 (2)
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toor3 |
| 26-01-18 | Dan |
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32_b_keys | diff |
LLR: 0.25 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 31 (5)
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try 32 bit keys |
| 26-01-18 | fau |
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antid3 | diff |
LLR: 0.23 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 13 (4)
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antid3 |
| 26-01-14 | Viz |
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prbShortcut1 | diff |
LLR: 0.23 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 20 (3)
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Take 1 |
| 26-01-18 | fau |
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antid1 | diff |
LLR: 0.12 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 19 (3)
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antid1 |
| 26-01-17 | sg |
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tuned_lmr_conditions2 | diff |
LLR: 0.10 (-2.94,2.94) <0.50,2.50>
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sprt
@ 60+0.6 th 1
cores: 70 (6)
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LTC: [Rebased] After 92k LTC lmr conditions tuning test most significant negative param A[0][1][2] (because less reduction scales good at ttPv nodes skip this condition). |
| 26-01-18 | Viz |
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longImpr2 | diff |
LLR: -0.04 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 16 (2)
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Take 2 |
| 26-01-16 | sg |
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tuned_lmr_conditions2b | diff |
LLR: -0.10 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 16 (2)
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After 92k LTC lmr conditions tuning test most significant negative param A[0][1][2] but use opposite precondition ttPv (the original precondition failed and allowing both struggles but seem at least neutral). |
| 26-01-17 | sg |
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tuned_lmr_conditions2a | diff |
LLR: -0.17 (-2.94,2.94) <0.50,2.50>
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sprt
@ 60+0.6 th 1
cores: 31 (6)
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LTC: STC failed but as values were tuned at LTC try this now (TP 50%). After 92k LTC lmr conditions tuning test most significant negative param A[0][1][2]. |
| 26-01-18 | Viz |
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longImpr1 | diff |
LLR: -0.26 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 16 (2)
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Take 1 |
| 26-01-16 | sni |
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style | diff |
LLR: -0.27 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 27 (4)
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take 3 |
| 26-01-14 | Viz |
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seerYoink2 | diff |
LLR: -0.28 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 22 (3)
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Take 2 |
| 26-01-15 | sni |
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style | diff |
LLR: -0.34 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 22 (4)
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Tal style = 1 when simple*nnue > 0 |
| 26-01-16 | Dan |
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smaller_si | diff |
LLR: -0.41 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 24 (4)
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speedup = +0.0021, P(speedup > 0) = 0.9744, i7-8750H |
| 26-01-18 | fau |
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toor3a | diff |
LLR: -0.82 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 16 (2)
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toor3a |
| 26-01-18 | fau |
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toor3b | diff |
LLR: -0.83 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 18 (1)
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toor3b |
| 26-01-15 | sg |
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tt_stm2 | diff |
LLR: -0.84 (-2.94,2.94) <0.00,2.00>
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sprt
@ 5+0.05 th 8
cores: 48 (5)
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STC gainer test with hash pressure struggles. So try STC SMP with hash pressure (4 MB) because theoretically the should be more collision because of the overlapping search of the different threads. Shift position key one bit up and replace lowest bit with side to move. So white and black side to move positions never matches as hit in TT. |
| 26-01-15 | sni |
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style^ | diff |
LLR: -0.86 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 25 (4)
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Tal style = 3 when simple*nnue > 0 |
| 26-01-17 | sni |
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style | diff |
LLR: -0.92 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 24 (3)
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Tal style = 1 when simple*nnue < 0 |
| 26-01-12 | sg |
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tt_stm2 | diff |
LLR: -1.11 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 32 (4)
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With normal hash pressure this change seems to have not much effect. So try with hash pressure (1 MB). Shift position key one bit up and replace lowest bit with side to move. So white and black side to move positions never matches as hit in TT. |
| 26-01-12 | Viz |
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pvLmrDeeS1 | diff |
LLR: -1.13 (-2.94,2.94) <0.50,2.50>
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sprt
@ 60+0.6 th 8
cores: 195 (14)
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LTC: ?? |
| 26-01-17 | Viz |
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seerYoink3 | diff |
LLR: -1.81 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 18 (3)
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Take 3 |
| 26-01-15 | sg |
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tt_stm2 | diff |
LLR: -1.84 (-2.94,2.94) <0.00,2.00>
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sprt
@ 60+0.6 th 1
cores: 36 (6)
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LTC: Regression tests with default hash passed and LTC with even around 1.76 elo. The hash pressure tests at low TC (singel and SMP) seems not good. So retest the non-regression lTC as LTC gainer with STC bounds and try the VVLTC route. Shift position key one bit up and replace lowest bit with side to move. So white and black side to move positions never match as hit in TT. |
| 26-01-16 | Dan |
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stat_ld_ph_1 | diff |
LLR: -2.36 (-2.94,2.94) <0.00,2.00>
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sprt
@ 10+0.1 th 1
cores: 24 (3)
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take 1 |
| 26-01-16 | vdv |
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master | diff |
Elo: 46.32 ± 1.4 (95%) LOS: 100.0%
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60000
@ 60+0.6 th 1
cores: 78 (5)
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Progression test of "update the WDL model" of Jan 15 vs SF_17. |
| 26-01-16 | vdv |
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master | diff |
Elo: 29.61 ± 1.3 (95%) LOS: 100.0%
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60000
@ 60+0.6 th 1
cores: 99 (9)
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Endgames Progression test of "update the WDL model" of Jan 15 vs SF_17. |
| 26-01-16 | vdv |
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master | diff |
Elo: 58.27 ± 1.5 (95%) LOS: 100.0%
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60000
@ 60+0.6 th 1
cores: 104 (7)
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DFRC Progression test of "update the WDL model" of Jan 15 vs SF_17. |
| 26-01-16 | vdv |
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master | diff |
Elo: 43.69 ± 1.3 (95%) LOS: 100.0%
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60000
@ 60+0.6 th 8
cores: 557 (8)
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SMP Progression test of "update the WDL model" of Jan 15 vs SF_17. |
| 26-01-16 | fau |
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prova | diff |
20834/150000 iterations
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300000
@ 60+0.6 th 1
cores: 34 (4)
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prova - this should fix the "Infinite Extension" bug |
| 26-01-17 | Dan |
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cm_mc_b_1_tune | diff |
7547/30000 iterations
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60000
@ 60+0.6 th 1
cores: 51 (5)
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merge |