Analog Scan: Unlocking A New Era In Mixed-Signal Test


Anyone involved in IC product sign-off that includes a mixed signal design portion knows that developing robust tests for these intricate designs has historically been a significant bottleneck, no matter the application. It's a hurdle many of us have faced, leading to extended development times, high costs, and sometimes an unsettling uncertainty about the true quality of our tests. Traditio... » read more

Neuromorphic HW That Detects Motion Changes 4X Faster (Beihang, BIT, KAUST, Cambridge et al.)


A new technical paper titled "Ultrafast visual perception beyond human capabilities enabled by motion analysis using synaptic transistors" was published by researchers at Beihang University, Beijing Institute of Technology, KAUST, University of Cambridge and others. Excerpt from Abstract "We introduce a neuromorphic temporal-attention hardware that emulates the interaction between the ret... » read more

Flexible ICs, MEMS, Metal Oxides Solve Fresh Problems


Key Takeaways: Flexible ICs are durable and form-fitting, but they add manufacturing challenges to already complex processes, while printed flex sensors lack infrastructure. MEMS are finding new popularity in massively parallel systems, on one device, or in many devices distributed across a network. Metal oxide-based sensors are more scalable than those relying on photonic crystals, ... » read more

Research Bits: Jan. 27


Analog in-memory compute Researchers from Politecnico di Milano, Peking University, and Hewlett Packard Labs developed a Closed-Loop In-Memory Computing (CL-IMC) chip to reduce data movement between memory and processor. The fully integrated analog accelerator uses two 64×64 arrays of programmable SRAM cells along with integrated components including operational amplifiers and analog-to-di... » read more

AI In A/MS IC Design: Between Buzzword And Productivity Boost


In the past few years, AI has burst onto the public stage in grand style. This ongoing trend is apparent in the rising number of AI applications in everyday life. But more and more, it can also be seen in a broad range of technical niches, where the main motivation is AI’s promise of continuously increasing efficiency. One such niche that has seen decades of attempts to achieve greater eff... » read more

LLMs on Analog In-Memory Computing Based Hardware (IBM Research, ETH Zurich)


A technical paper titled "Analog Foundation Models" was published by IBM Research– Zurich, ETH Zurich, IBM Research-Almaden, and IBM TJ Watson Research Center. Abstract: "Analog in-memory computing (AIMC) is a promising compute paradigm to improve speed and power efficiency of neural network inference beyond the limits of conventional von Neumann-based architectures. However, AIMC intro... » read more

Changes In Mixed-Signal IC Verification


Analog and digital engineers traditionally have worked in very different worlds. Many analog engineers for years have opted to verify analog designs by scrutinizing waveforms, while digital engineers have treated analog blocks like black boxes. But as these two areas converge in advanced SoCs and multi-die assemblies, the demarcation line between these engineering disciplines is being erased. S... » read more

Even With AI Inroads, Human Chip Designers Still Essential


The proliferation of AI tools seems perfectly matched to fill a talent shortage, but a closer look shows the skills do not entirely overlap. Certain parts of the EDA pipeline require human engineers, and it seems likely to stay that way for the foreseeable future. The dark art of analog design, the final word on safety-critical functional safety, high-level architectural decisions, product i... » read more

AI-Empowered Analog IC Sizing Methods (Univ. of Glasgow Et Al.)


A new technical paper titled "From Systematic to Intelligent: Assessing AI-Empowered Optimization Techniques for Analog Building Block Sizing" was published by researchers at University of Glasgow, Mediatek, The University of Edinburgh, Magics Technologies NV, University of Sevilla and Georgia Institute of Technology. Abstract "This paper presents a comprehensive, design-insight-based compa... » read more

Analog IMC Attention Mechanism For Fast And Energy-Efficient LLMs (FZJ, RWTH Aachen)


A new technical paper titled "Analog in-memory computing attention mechanism for fast and energy-efficient large language models" was published by researchers at Forschungszentrum Jülich and RWTH Aachen. Abstract "Transformer networks, driven by self-attention, are central to large language models. In generative transformers, self-attention uses cache memory to store token projec... » read more

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