freenet.support.CPUInformation

## Class CPUIDCPUInfo

- java.lang.Object
- - freenet.support.CPUInformation.CPUIDCPUInfo

- All Implemented Interfaces:
    CPUInfo
  Direct Known Subclasses:
    AMDInfoImpl, IntelInfoImpl, VIAInfoImpl

      class CPUIDCPUInfo
      extends Object
      implements CPUInfo

  Moved out of CPUID.java Ref: http://en.wikipedia.org/wiki/CPUID

- - ### Constructor Summary

    Constructors
    Constructor and Description
    `CPUIDCPUInfo()`

  - ### Method Summary

    All Methods Instance Methods Concrete Methods
    Modifier and Type | Method and Description
    --- | ---
    `String` | `getCPUModelString()` Gets the CPU model description.
    `String` | `getVendor()` Gets the CPU vendor.
    `boolean` | `hasABM()` Also known as LZCNT
    `boolean` | `hasADX()` Intel Multi-Precision Add-Carry Instruction Extensions Available in Broadwell.
    `boolean` | `hasAES()` Checks if CPU supports the AES-NI instruction set.
    `boolean` | `hasAVX()` Checks if CPU supports the AVX instruction set.
    `boolean` | `hasAVX2()` Checks if CPU supports the AVX2 instruction set.
    `boolean` | `hasAVX512()` Does the CPU supports the AVX-512 Foundation instruction set? Quote wikipedia: AVX-512 consists of multiple extensions not all meant to be supported by all processors implementing them.
    `boolean` | `hasBMI1()` Checks if CPU supports the BMI1 instruction set.
    `boolean` | `hasBMI2()` Checks if CPU supports the BMI2 instruction set.
    `boolean` | `hasFMA3()` Checks if CPU supports the FMA3 instruction set.
    `boolean` | `hasMMX()` Checks if CPU supports the MMX instruction set.
    `boolean` | `hasMOVBE()` Checks if CPU supports the MOVBE instruction set.
    `boolean` | `hasSSE()` Checks if CPU supports the SSE instruction set.
    `boolean` | `hasSSE2()` Checks if CPU supports the SSE2 instruction set.
    `boolean` | `hasSSE3()` Checks if CPU supports the SSE3 instruction set.
    `boolean` | `hasSSE41()` Checks if CPU supports the SSE4.1 instruction set.
    `boolean` | `hasSSE42()` Checks if CPU supports the SSE4.2 instruction set.
    `boolean` | `hasSSE4A()` AMD K10 only.
    `boolean` | `hasTBM()` Trailing Bit Manipulation (AMD feature)
    `boolean` | `hasX64()` Checks if CPU supports the 64-bit support.

    - ### Methods inherited from class java.lang.Object

      `clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait`

- - ### Constructor Detail

    - #### CPUIDCPUInfo

          CPUIDCPUInfo()

  - ### Method Detail

    - #### getCPUModelString

          public String getCPUModelString()
                                   throws UnknownCPUException

      Description copied from interface: `CPUInfo`
      Gets the CPU model description.
      Specified by:
        `getCPUModelString` in interface `CPUInfo`
      Returns:
        A string detailing what type of CPU that is present in the machine. I.e. 'Pentium IV' etc.
      Throws:
        `UnknownCPUException` - If for any reason the retrieval of the requested information failed. The message encapsulated in the execption indicates the cause of the failure.

    - #### getVendor

          public String getVendor()

      Description copied from interface: `CPUInfo`
      Gets the CPU vendor.
      Specified by:
        `getVendor` in interface `CPUInfo`
      Returns:
        A string indicating the vendor of the CPU.

    - #### hasABM

          public boolean hasABM()

      Also known as LZCNT
      Specified by:
        `hasABM` in interface `CPUInfo`
      Returns:
        true iff the CPU supports the ABM instruction set.

    - #### hasADX

          public boolean hasADX()

      Intel Multi-Precision Add-Carry Instruction Extensions Available in Broadwell. Unused until GMP 6.1.
      Specified by:
        `hasADX` in interface `CPUInfo`
      Returns:
        true iff the CPU supports the ADX instruction set.

    - #### hasAES

          public boolean hasAES()

      Description copied from interface: `CPUInfo`
      Checks if CPU supports the AES-NI instruction set.
      Specified by:
        `hasAES` in interface `CPUInfo`
      Returns:
        true iff the CPU supports the AES-NI instruction set.

    - #### hasAVX

          public boolean hasAVX()

      Description copied from interface: `CPUInfo`
      Checks if CPU supports the AVX instruction set.
      Specified by:
        `hasAVX` in interface `CPUInfo`
      Returns:
        true iff the CPU supports the AVX instruction set.

    - #### hasAVX2

          public boolean hasAVX2()

      Description copied from interface: `CPUInfo`
      Checks if CPU supports the AVX2 instruction set.
      Specified by:
        `hasAVX2` in interface `CPUInfo`
      Returns:
        true iff the CPU supports the AVX2 instruction set.

    - #### hasAVX512

          public boolean hasAVX512()

      Does the CPU supports the AVX-512 Foundation instruction set? Quote wikipedia: AVX-512 consists of multiple extensions not all meant to be supported by all processors implementing them. Only the core extension AVX-512F (AVX-512 Foundation) is required by all implementations. ref: https://en.wikipedia.org/wiki/AVX-512
      Specified by:
        `hasAVX512` in interface `CPUInfo`
      Returns:
        true iff the CPU supports the AVX-512 Foundation instruction set.

    - #### hasBMI1

          public boolean hasBMI1()

      Description copied from interface: `CPUInfo`
      Checks if CPU supports the BMI1 instruction set.
      Specified by:
        `hasBMI1` in interface `CPUInfo`
      Returns:
        true iff the CPU supports the BMI1 instruction set.

    - #### hasBMI2

          public boolean hasBMI2()

      Description copied from interface: `CPUInfo`
      Checks if CPU supports the BMI2 instruction set.
      Specified by:
        `hasBMI2` in interface `CPUInfo`
      Returns:
        true iff the CPU supports the BMI2 instruction set.

    - #### hasFMA3

          public boolean hasFMA3()

      Description copied from interface: `CPUInfo`
      Checks if CPU supports the FMA3 instruction set.
      Specified by:
        `hasFMA3` in interface `CPUInfo`
      Returns:
        true iff the CPU supports the FMA3 instruction set.

    - #### hasMMX

          public boolean hasMMX()

      Description copied from interface: `CPUInfo`
      Checks if CPU supports the MMX instruction set.
      Specified by:
        `hasMMX` in interface `CPUInfo`
      Returns:
        true iff CPU supports the MMX instruction set.

    - #### hasMOVBE

          public boolean hasMOVBE()

      Description copied from interface: `CPUInfo`
      Checks if CPU supports the MOVBE instruction set.
      Specified by:
        `hasMOVBE` in interface `CPUInfo`
      Returns:
        true iff the CPU supports the MOVBE instruction set.

    - #### hasSSE

          public boolean hasSSE()

      Description copied from interface: `CPUInfo`
      Checks if CPU supports the SSE instruction set.
      Specified by:
        `hasSSE` in interface `CPUInfo`
      Returns:
        true iff the CPU supports the SSE instruction set.

    - #### hasSSE2

          public boolean hasSSE2()

      Description copied from interface: `CPUInfo`
      Checks if CPU supports the SSE2 instruction set.
      Specified by:
        `hasSSE2` in interface `CPUInfo`
      Returns:
        true iff the CPU supports the SSE2 instruction set.

    - #### hasSSE3

          public boolean hasSSE3()

      Description copied from interface: `CPUInfo`
      Checks if CPU supports the SSE3 instruction set.
      Specified by:
        `hasSSE3` in interface `CPUInfo`
      Returns:
        true iff the CPU supports the SSE3 instruction set.

    - #### hasSSE41

          public boolean hasSSE41()

      Description copied from interface: `CPUInfo`
      Checks if CPU supports the SSE4.1 instruction set.
      Specified by:
        `hasSSE41` in interface `CPUInfo`
      Returns:
        true iff the CPU supports the SSE4.1 instruction set.

    - #### hasSSE42

          public boolean hasSSE42()

      Description copied from interface: `CPUInfo`
      Checks if CPU supports the SSE4.2 instruction set.
      Specified by:
        `hasSSE42` in interface `CPUInfo`
      Returns:
        true iff the CPU supports the SSE4.2 instruction set.

    - #### hasSSE4A

          public boolean hasSSE4A()

      Description copied from interface: `CPUInfo`
      AMD K10 only. Not supported on Intel. ref: https://en.wikipedia.org/wiki/SSE4.2#SSE4a
      Specified by:
        `hasSSE4A` in interface `CPUInfo`
      Returns:
        true iff the CPU supports the SSE4A instruction set.

    - #### hasTBM

          public boolean hasTBM()

      Trailing Bit Manipulation (AMD feature)
      Specified by:
        `hasTBM` in interface `CPUInfo`
      Returns:
        true iff the CPU supports TBM.

    - #### hasX64

          public boolean hasX64()

      Description copied from interface: `CPUInfo`
      Checks if CPU supports the 64-bit support.
      Specified by:
        `hasX64` in interface `CPUInfo`
      Returns:
        true iff the CPU supports the 64-bit support