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[configure] Add support for RISC-V ZBC extension
1 parent 830995f commit 0acad89

3 files changed

Lines changed: 94 additions & 6 deletions

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arch/riscv/Makefile.in

Lines changed: 12 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -15,19 +15,22 @@ SRCTOP=../..
1515
TOPDIR=$(SRCTOP)
1616

1717
RVVFLAG=
18+
RVVZBCFLAG=
19+
ZBCFLAG=
1820

1921
all: \
2022
riscv_features.o riscv_features.lo \
2123
adler32_rvv.o adler32_rvv.lo \
2224
chunkset_rvv.o chunkset_rvv.lo \
2325
compare256_rvv.o compare256_rvv.lo \
24-
slide_hash_rvv.o slide_hash_rvv.lo
26+
slide_hash_rvv.o slide_hash_rvv.lo \
27+
crc32_zbc.o crc32_zbc.lo
2528

2629
riscv_features.o: $(SRCDIR)/riscv_features.c
27-
$(CC) $(CFLAGS) $(RVVFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/riscv_features.c
30+
$(CC) $(CFLAGS) $(RVVZBCFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/riscv_features.c
2831

2932
riscv_features.lo: $(SRCDIR)/riscv_features.c
30-
$(CC) $(SFLAGS) $(RVVFLAG) -DPIC $(INCLUDES) -c -o $@ $(SRCDIR)/riscv_features.c
33+
$(CC) $(SFLAGS) $(RVVZBCFLAG) -DPIC $(INCLUDES) -c -o $@ $(SRCDIR)/riscv_features.c
3134

3235
adler32_rvv.o: $(SRCDIR)/adler32_rvv.c
3336
$(CC) $(CFLAGS) $(RVVFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/adler32_rvv.c
@@ -53,6 +56,12 @@ slide_hash_rvv.o: $(SRCDIR)/slide_hash_rvv.c
5356
slide_hash_rvv.lo: $(SRCDIR)/slide_hash_rvv.c
5457
$(CC) $(SFLAGS) $(RVVFLAG) -DPIC $(INCLUDES) -c -o $@ $(SRCDIR)/slide_hash_rvv.c
5558

59+
crc32_zbc.o: $(SRCDIR)/crc32_zbc.c
60+
$(CC) $(CFLAGS) $(ZBCFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/crc32_zbc.c
61+
62+
crc32_zbc.lo: $(SRCDIR)/crc32_zbc.c
63+
$(CC) $(SFLAGS) $(ZBCFLAG) -DPIC $(INCLUDES) -c -o $@ $(SRCDIR)/crc32_zbc.c
64+
5665
mostlyclean: clean
5766
clean:
5867
rm -f *.o *.lo *~

arch/riscv/riscv_features.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -60,6 +60,7 @@ void Z_INTERNAL riscv_check_features(struct riscv_cpu_features *features) {
6060
riscv_check_features_runtime(features);
6161
else
6262
riscv_check_features_compile_time(features);
63+
#ifdef RISCV_RVV
6364
if (features->has_rvv) {
6465
size_t e8m1_vec_len;
6566
intptr_t vtype_reg_val;
@@ -76,4 +77,5 @@ void Z_INTERNAL riscv_check_features(struct riscv_cpu_features *features) {
7677
// bytes
7778
features->has_rvv = (vtype_reg_val >= 0 && e8m1_vec_len >= 16);
7879
}
80+
#endif
7981
}

configure

Lines changed: 80 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -100,6 +100,7 @@ buildpower8=1
100100
buildpower9=1
101101
buildneon=1
102102
buildrvv=1
103+
buildzbc=1
103104
builddfltccdeflate=0
104105
builddfltccinflate=0
105106
buildcrc32vx=1
@@ -120,6 +121,11 @@ xsaveflag="-mxsave"
120121
armv8flag=
121122
neonflag=
122123
rvvflag=
124+
rvvzbcflag=
125+
zbcflag=
126+
# We need to set defaults so we can test if either RVV or ZBC or both are disabled
127+
HAVE_RVV_INTRIN=0
128+
HAVE_ZBC_EXT=0
123129
armv6flag=
124130
noltoflag="-fno-lto"
125131
vgfmaflag="-march=z13"
@@ -174,6 +180,7 @@ case "$1" in
174180
echo ' [--without-neon] Compiles without ARM Neon SIMD instruction set' | tee -a configure.log
175181
echo ' [--without-armv6] Compiles without ARMv6 SIMD instruction set' | tee -a configure.log
176182
echo ' [--without-rvv] Compiles without RVV instruction set' | tee -a configure.log
183+
echo ' [--without-zbc] Compiles without ZBC instruction set' | tee -a configure.log
177184
echo ' [--without-altivec] Compiles without PPC AltiVec support' | tee -a configure.log
178185
echo ' [--without-power8] Compiles without Power8 instruction set' | tee -a configure.log
179186
echo ' [--with-dfltcc-deflate] Use DEFLATE CONVERSION CALL instruction for compression on IBM Z' | tee -a configure.log
@@ -211,6 +218,7 @@ case "$1" in
211218
--without-armv6) buildarmv6=0; shift ;;
212219
--without-altivec) buildaltivec=0 ; shift ;;
213220
--without-rvv) buildrvv=0 ; shift ;;
221+
--without-zbc) buildzbc=0 ; shift ;;
214222
--without-power8) buildpower8=0 ; shift ;;
215223
--without-power9) buildpower9=0 ; shift ;;
216224
--with-dfltcc-deflate) builddfltccdeflate=1; shift ;;
@@ -944,6 +952,22 @@ fi
944952

945953
echo >> configure.log
946954

955+
# check for linux/auxvec.h
956+
cat > $test.c <<EOF
957+
#include <linux/auxvec.h>
958+
int main() { return 0; }
959+
EOF
960+
if try $CC -c $CFLAGS $test.c; then
961+
echo "Checking for linux/auxvec.h... Yes." | tee -a configure.log
962+
CFLAGS="${CFLAGS} -DHAVE_LINUX_AUXVEC_H"
963+
SFLAGS="${SFLAGS} -DHAVE_LINUX_AUXVEC_H"
964+
else
965+
echo "Checking for linux/auxvec.h... No." | tee -a configure.log
966+
fi
967+
968+
echo >> configure.log
969+
970+
947971
# check for ptrdiff_t and save result in zconf.h
948972
printf "Checking for ptrdiff_t... " | tee -a configure.log
949973
cat > $test.c <<EOF
@@ -1712,12 +1736,48 @@ EOF
17121736
if [ -n "$rvvflag" ] && try ${CC} ${CFLAGS} ${rvvflag} $test.c; then
17131737
echo "Checking for RISC-V Vector intrinsics ... Yes." | tee -a configure.log
17141738
HAVE_RVV_INTRIN=1
1739+
rvvzbcflag="${rvvflag}"
17151740
else
17161741
echo "Checking for RISC-V Vector intrinsics ... No." | tee -a configure.log
17171742
HAVE_RVV_INTRIN=0
17181743
fi
17191744
}
17201745

1746+
check_zbc_compiler_flag() {
1747+
cat > $test.c << EOF
1748+
int main() { return 0; }
1749+
EOF
1750+
if try $CC -c $CFLAGS -march=rv64gc_zbc $test.c; then
1751+
echo "Check whether -march=rv64gc_zbc works ... Yes." | tee -a configure.log
1752+
zbcflag="-march=rv64gc_zbc"
1753+
if test $buildrvv -eq 1 -a "$HAVE_RVV_INTRIN" -eq 1; then
1754+
rvvzbcflag="${rvvflag}_zbc"
1755+
else
1756+
rvvzbcflag="${zbcflag}"
1757+
fi
1758+
else
1759+
echo "Check whether -march=rv64gc_zbc works ... No." | tee -a configure.log
1760+
zbcflag=""
1761+
fi
1762+
1763+
cat > $test.c << EOF
1764+
#include <stdint.h>
1765+
uint64_t f(uint64_t a, uint64_t b) {
1766+
uint64_t c;
1767+
__asm__ __volatile__ ("clmul %[result], %[input_a], %[input_b]" : [result] "=r" (c) : [input_a] "r" (a), [input_b] "r" (b));
1768+
return c;
1769+
}
1770+
int main(void) { return f(1, 2); }
1771+
EOF
1772+
if [ -n "$zbcflag" ] && try ${CC} ${CFLAGS} ${zbcflag} $test.c; then
1773+
echo "Checking for RISC-V ZBC extension ... Yes." | tee -a configure.log
1774+
HAVE_ZBC_EXT=1
1775+
else
1776+
echo "Checking for RISC-V ZBC extension ... No." | tee -a configure.log
1777+
HAVE_ZBC_EXT=0
1778+
fi
1779+
}
1780+
17211781
# Check whether to disable deflate_medium and deflate_quick
17221782
if test $without_new_strategies -eq 1; then
17231783
CFLAGS="${CFLAGS} -DNO_QUICK_STRATEGY -DNO_MEDIUM_STRATEGY"
@@ -2093,22 +2153,37 @@ EOF
20932153
ARCHDIR=arch/riscv
20942154

20952155
if test $without_optimizations -eq 0; then
2156+
if test $buildrvv -eq 1 -o $buildzbc -eq 1; then
2157+
CFLAGS="${CFLAGS} -DRISCV_FEATURES"
2158+
SFLAGS="${SFLAGS} -DRISCV_FEATURES"
2159+
2160+
ARCH_STATIC_OBJS="${ARCH_STATIC_OBJS} riscv_features.o"
2161+
ARCH_SHARED_OBJS="${ARCH_SHARED_OBJS} riscv_features.lo"
2162+
fi
20962163
if test $buildrvv -eq 1; then
20972164
check_rvv_compiler_flag
20982165

20992166
if test $HAVE_RVV_INTRIN -eq 1; then
21002167
CFLAGS="${CFLAGS} -DRISCV_FEATURES -DRISCV_RVV"
21012168
SFLAGS="${SFLAGS} -DRISCV_FEATURES -DRISCV_RVV"
21022169

2103-
ARCH_STATIC_OBJS="${ARCH_STATIC_OBJS} riscv_features.o"
2104-
ARCH_SHARED_OBJS="${ARCH_SHARED_OBJS} riscv_features.lo"
2105-
21062170
ARCH_STATIC_OBJS="${ARCH_STATIC_OBJS} adler32_rvv.o chunkset_rvv.o compare256_rvv.o slide_hash_rvv.o"
21072171
ARCH_SHARED_OBJS="${ARCH_SHARED_OBJS} adler32_rvv.lo chunkset_rvv.lo compare256_rvv.lo slide_hash_rvv.lo"
21082172

21092173
ARCH="${ARCH}+rvv"
21102174
fi
21112175
fi
2176+
if test $buildzbc -eq 1; then
2177+
check_zbc_compiler_flag
2178+
2179+
if test $HAVE_ZBC_EXT -eq 1; then
2180+
CFLAGS="${CFLAGS} -DRISCV_CRC32_ZBC"
2181+
SFLAGS="${SFLAGS} -DRISCV_CRC32_ZBC"
2182+
2183+
ARCH_STATIC_OBJS="${ARCH_STATIC_OBJS} crc32_zbc.o"
2184+
ARCH_SHARED_OBJS="${ARCH_SHARED_OBJS} crc32_zbc.lo"
2185+
fi
2186+
fi
21122187
fi
21132188
;;
21142189
s390x)
@@ -2364,6 +2439,8 @@ sed < $SRCDIR/$ARCHDIR/Makefile.in "
23642439
/^VGFMAFLAG *=/s#=.*#=$vgfmaflag#
23652440
/^PPCFLAGS *=/s#=.*#=$vmxflag#
23662441
/^RVVFLAG *=/s#=.*#=$rvvflag#
2442+
/^RVVZBCFLAG *=/s#=.*#=$rvvzbcflag#
2443+
/^ZBCFLAG *=/s#=.*#=$zbcflag#
23672444
" > $ARCHDIR/Makefile
23682445

23692446
# Append header files dependencies.

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