platform: mellanox: Change "reset_pwr_converter_fail" attribute

vadimp-nvidia · jwrdegoede · commit 488f0fca0db0 · 2023-02-10T17:43:32.000+01:00
Change "reset_voltmon_upgrade_fail" attribute name to "reset_pwr_converter_fail". For systems using "mlxplat_mlxcpld_default_ng_regs_io_data", relevant CPLD 'register.bit' indicates the failure of power converter, while on older systems same 'register.bit' indicates failure of voltage monitor devices upgrade failure. Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Michael Shych <michaelsh@nvidia.com> Link: https://lore.kernel.org/r/20230208063331.15560-3-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
@@ -3186,7 +3186,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
 		.mode = 0444,
 	},
 	{
-		.label = "reset_voltmon_upgrade_fail",
+		.label = "reset_pwr_converter_fail",
 		.reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET,
 		.mask = GENMASK(7, 0) & ~BIT(0),
 		.mode = 0444,

Original file line number	Diff line number	Diff line change
`@@ -3186,7 +3186,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {`
`3186`	`3186`	`.mode = 0444,`
`3187`	`3187`	`},`
`3188`	`3188`	`{`
`3189`		`- .label = "reset_voltmon_upgrade_fail",`
	`3189`	`+ .label = "reset_pwr_converter_fail",`
`3190`	`3190`	`.reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET,`
`3191`	`3191`	`.mask = GENMASK(7, 0) & ~BIT(0),`
`3192`	`3192`	`.mode = 0444,`