platform/x86: mlx-platform: Add BIOS attributes for CoffeeLake COMEx based systems

vadimp-nvidia · jwrdegoede · commit 4289fd4ad43a · 2021-10-27T16:29:03.000+02:00
Extend systems of class VMOD0010 equipped with CoffeeLake COMEx module with BIOS related attributes to represent various BIOS statuses. These attributes "bios_active_image", "bios_auth_fail", "bios_upgrade_fail", "bios_safe_mode" has been already added to modular system. This all of them are already documented. - "bios_active_image" - location of current active BIOS image (0: Top, 1: Bottom. The reported value should correspond to value expected by OS in case of BIOS safe mode is 0. This bit is related to Intel top-swap feature of DualBios on the same flash. - "bios_auth_fail": BIOS upgrade is failed because provided BIOS image is not signed correctly. - "bios_upgrade_fail" BIOS upgrade is failed by some reason not related to authentication. For example, due to physical SPI flash problem. - "bios_safe_mod": - 0 : if BIOS is booted from a supposed active image; 1 : BIOS safe mechanism was enforced by hardware (CPLD). Signed-off-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Oleksandr Shamray <oleksandrs@nvidia.com> Link: https://lore.kernel.org/r/20211023094022.4193813-3-vadimp@nvidia.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
@@ -2917,6 +2917,30 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
 		.bit = GENMASK(7, 0),
 		.mode = 0444,
 	},
+	{
+		.label = "bios_safe_mode",
+		.reg = MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET,
+		.mask = GENMASK(7, 0) & ~BIT(4),
+		.mode = 0444,
+	},
+	{
+		.label = "bios_active_image",
+		.reg = MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET,
+		.mask = GENMASK(7, 0) & ~BIT(5),
+		.mode = 0444,
+	},
+	{
+		.label = "bios_auth_fail",
+		.reg = MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET,
+		.mask = GENMASK(7, 0) & ~BIT(6),
+		.mode = 0444,
+	},
+	{
+		.label = "bios_upgrade_fail",
+		.reg = MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET,
+		.mask = GENMASK(7, 0) & ~BIT(7),
+		.mode = 0444,
+	},
 	{
 		.label = "voltreg_update_status",
 		.reg = MLXPLAT_CPLD_LPC_REG_GP0_RO_OFFSET,
