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Add PCIe config file of DX010 and E1031#4724

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sujinmkang merged 1 commit intosonic-net:masterfrom
carycelestica:master
Jun 25, 2020
Merged

Add PCIe config file of DX010 and E1031#4724
sujinmkang merged 1 commit intosonic-net:masterfrom
carycelestica:master

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@carycelestica
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What I did
Make a PCIe Diag tool for SONiC. This tool including two commands.
Commands added:
show platform pcieinfo -----> Show current device PCIe info
show platform pcieinfo -c -----> Check whether the PCIe info is correct

How I did it

  1. Add pcieutil moudle in sonic-utilities:

    Location: sonic-utilities/pcieutil/main.py
    Function: The main function will import the common API pcie_common.py and distinguish current platform

    get_platform_and_hwsku()
    Return the platform path like : /usr/share/sonic/device/$PLATFORM/plugins

  2. Add common API in pcie_common.py:

    Location: sonic_platform_base/sonic_pice/pcie_common.py
    Function: This file is used to fulfill the main interfaces including functions

    get_pcie_device()
    Getting current pcie info of the device;
    get_pcie_check()
    Compare the pcie info it got currently with pcie.yaml
    dump_conf_yaml()
    This function is used to generate pcie.yaml which used to record the original pcie info.Also you can make the pcie.yaml manually but should follow the format;

  3. The pcie.yaml file

    location: /usr/share/sonic/device/$PLATFORM/plugins/pcie.yaml
    Function:
    Used to record the original PCIe info of the device;
    Used as a criterion for judging whether the PCIe info we get is correct or not;

    how to generate this file?
    Two methods:

    1. Make it manually.But should follow the format;
    2. Use the below command to generate one.
      pcieutil pcie_generate

    The pcie.yaml is under different path due to different platforms.
    The common API will load the config file to compare with PCIe info of current device.If not found, will raise a system warning and exit

  4. How should different platform designer do if they need to use this tool.
    Just add a pcie.yaml under the config file path
    You can get a general config file and the file path by running command
    pcieutil pcie_generate
    but when you do that ,make sure the PCIe config info is correct

New command output
root@sonic:~# show platform pcieinfo
==============================Display PCIe Device===============================
......
bus:dev.fn 01:00.0 - dev_id=0xb960, Ethernet controller: Broadcom Limited Device b960
bus:dev.fn 01:00.1 - dev_id=0xb960, Ethernet controller: Broadcom Limited Device b960

root@sonic:~# show platform pcieinfo -c
===============================PCIe Device Check================================
Error: [Errno 2] No such file or directory: '/usr/share/sonic/device/x86_64-cel_seastone-r0/plugins/pcie.yaml'
Not found config file, please add a config file manually, or generate it by running [pcieutil pcie_generate]

root@sonic:~# pcieutil pcie_generate
Are you sure to overwrite config file pcie.yaml with current pcie device info? [y/N]: y
generate config file pcie.yaml under path /usr/share/sonic/device/x86_64-cel_seastone-r0/plugins

root@sonic:~# show platform pcieinfo -c
===============================PCIe Device Check================================
......
PCI Device: Ethernet controller: Broadcom Limited Device b960 ------------------ [Passed]
PCI Device: Ethernet controller: Broadcom Limited Device b960 ------------------ [Passed]
PCIe Device Checking All Test ----------->>> PASSED

root@sonic:~# show platform pcieinfo -c
===============================PCIe Device Check================================
......
PCI Device: Ethernet controller: Broadcom Limited Device b960 ------------------ [Failed]
PCI Device: Ethernet controller: Broadcom Limited Device b960 ------------------ [Passed]
PCIe Device Checking All Test ----------->>> FAILED

@sujinmkang
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retest mellanox please

dev: 1f
fn: '3'
id: 1f3c
name: 'SMBus: Intel Corporation Atom processor C2000 PCU SMBus'
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do we have a checker for this file?

@carycelestica
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reset please

@carycelestica
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yes, I have checked it, actually , It was generated by the PCIe tool

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4 participants