[PDDF] HLD Add multifpgapci module#2006
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adyeung merged 5 commits intosonic-net:masterfrom Sep 9, 2025
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This was referenced Jun 4, 2025
This was referenced Jun 4, 2025
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@FuzailBrcm pls help review |
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/azp run |
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prasoon-nexthop
approved these changes
Jun 13, 2025
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Has this HLD been reviewed in SONiC community Tuesday meeting or any workgroup? |
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Hi Yanzhao, This has been presented in https://lists.sonicfoundation.dev/g/sonic-dev/message/1056 All the related sonic-buildimage PRs referenced by the HLD have been reviewed and merged by the Broadcom team. Would it be possible to merge this PR as well? Thanks |
FuzailBrcm
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Sep 8, 2025
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louis-nexthop
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Sep 9, 2025
geans-pin
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Sep 9, 2025
adyeung
approved these changes
Sep 9, 2025
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Purpose
The existing PDDF framework supports a single PCIE FPGA in the system.
This HLD and series of changes adds PDDF support for multiple PCIE FPGAs in the system.
Fixes sonic-net/sonic-buildimage#22838
Changes
Note: changes 2-6 depend on 1 to build.
Please ignore commits described like
IGNORE THIS COMMIT: Multiple FPGAs w/ I2C IP block (PR sonic-net#22748)which are commits from 1 cherry-picked into other PRs.Example usage
The multifpgapci module is used by the Nexthop NH-4010 platform directory PR:
sonic-net/sonic-buildimage#22666