Our choice of DAC (DAC34H84) and PLL-Mixer (TRF372017) preclude passing DC to the TRF. AFAICT TI has specific recommendations for DAC-PLL/mixer pairings but we didn't follow it. I don't recall the design choices that led to this pairing but it appears there is no resolution possible with the current chip pair.
current filter network
Phaser v1.1 coupling between DAC and TRS looks like this.
This matches (approximately) the recommendation of the specification sheet for the TRF. In this approach the TRF chips provides it's own bias (1.7 V) to the I and Q inputs. In this mode the TRF also has DACs for trimming needed to achieve carrier feedthrough cancellation. However, this approach precludes IQ modulation that depends on DC from the DAC.
DAC can't supply 1.7V
TI provides an example filter network in the case that the DC-TRF coupling is DC-pass.
However, we can't use this approach because the maximum output of our DAC is -0.5 V and 0.6 V (for the differential outputs, spec sheet 6.5 Output compliance range).
pull-up resistor option
A TI application note discusses building a filter network with pull-up resistors (p 7). This would attenuate the DC component of the DAC by at least 0.5.
one motivation: PDH ESB locking
One application of Phaser is to generate phase modulation suitable for PDH electronic sideband locking (ESB) [0].
A way to do this with Phaser is phase modulated I and Q. However, this has a DC component that is blocked by the current filter network.
Ref
[0] Thorpe, J. I., Numata, K. & Livas, J. Laser frequency stabilization and control through offset sideband locking to optical cavities. Opt. Express 16, 15980 (2008).
Our choice of DAC (DAC34H84) and PLL-Mixer (TRF372017) preclude passing DC to the TRF. AFAICT TI has specific recommendations for DAC-PLL/mixer pairings but we didn't follow it. I don't recall the design choices that led to this pairing but it appears there is no resolution possible with the current chip pair.
current filter network
Phaser v1.1 coupling between DAC and TRS looks like this.
This matches (approximately) the recommendation of the specification sheet for the TRF. In this approach the TRF chips provides it's own bias (1.7 V) to the I and Q inputs. In this mode the TRF also has DACs for trimming needed to achieve carrier feedthrough cancellation. However, this approach precludes IQ modulation that depends on DC from the DAC.
DAC can't supply 1.7V
TI provides an example filter network in the case that the DC-TRF coupling is DC-pass.
However, we can't use this approach because the maximum output of our DAC is -0.5 V and 0.6 V (for the differential outputs, spec sheet 6.5 Output compliance range).
pull-up resistor option
A TI application note discusses building a filter network with pull-up resistors (p 7). This would attenuate the DC component of the DAC by at least 0.5.
one motivation: PDH ESB locking
One application of Phaser is to generate phase modulation suitable for PDH electronic sideband locking (ESB) [0].
A way to do this with Phaser is phase modulated I and Q. However, this has a DC component that is blocked by the current filter network.
Ref
[0] Thorpe, J. I., Numata, K. & Livas, J. Laser frequency stabilization and control through offset sideband locking to optical cavities. Opt. Express 16, 15980 (2008).