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Improve TSC emulation#1555

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sporksmith merged 7 commits intoshadow:mainfrom
sporksmith:fixed-tsc-rate
Aug 4, 2021
Merged

Improve TSC emulation#1555
sporksmith merged 7 commits intoshadow:mainfrom
sporksmith:fixed-tsc-rate

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@sporksmith sporksmith commented Aug 4, 2021 •
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  • Add case handling Xeon processors with base clock frequency of 25 MHz (fixing new tsc_test fails on my machine #1519 ).
  • Don't try to use clock rate from brand string as TSC rate, since it isn't guaranteed to be the same rate.
  • Consolidate setting TSC rate in host initialization, along-side initialization of emulated CPU.
  • Fall back to emulated CPU clock rate if we can't determine TSC rate, with a warning that using TSC to measure wallclock time will be inaccurate within the simulation.
  • Clean up some related environment variable parsing in the shim.

@github-actions github-actions bot added Component: Libraries Support functions like LD_PRELOAD and logging Component: Main Composing the core Shadow executable labels Aug 4, 2021
@sporksmith sporksmith linked an issue Aug 4, 2021 that may be closed by this pull request
new tsc_test fails on my machine #1519
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@sporksmith sporksmith changed the title Fixed tsc rate Improve TSC emulation Aug 4, 2021
@sporksmith sporksmith requested a review from stevenengler August 4, 2021 01:25
@sporksmith sporksmith marked this pull request as ready for review August 4, 2021 01:25
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codecov bot commented Aug 4, 2021 •
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Codecov Report

Merging #1555 (e3fb902) into main (edf8fa6) will increase coverage by 0.10%.
The diff coverage is 31.81%.

❗ Current head e3fb902 differs from pull request most recent head 678229a. Consider uploading reports for the commit 678229a to get more accurate results
Impacted file tree graph

@@            Coverage Diff             @@
##             main    #1555      +/-   ##
==========================================
+ Coverage   52.60%   52.70%   +0.10%     
==========================================
  Files         141      141              
  Lines       21249    21227      -22     
  Branches     5373     5365       -8     
==========================================
+ Hits        11178    11188      +10     
+ Misses       7112     7076      -36     
- Partials     2959     2963       +4
Flag Coverage Δ
tests 52.70% <31.81%> (+0.10%) ⬆️

Flags with carried forward coverage won't be shown. Click here to find out more.

Impacted Files Coverage Δ
src/lib/shim/shim.c 27.68% <0.00%> (-2.32%) ⬇️
src/lib/tsc/tsc.h 33.33% <ø> (ø)
src/main/host/thread_preload.c 0.00% <0.00%> (ø)
src/lib/tsc/tsc.c 33.80% <38.46%> (+21.80%) ⬆️
src/lib/tsc/tsc_test.c 30.37% <50.00%> (ø)
src/main/host/host.c 68.89% <75.00%> (+0.16%) ⬆️
src/main/host/thread_ptrace.c 50.24% <100.00%> (-0.09%) ⬇️
src/lib/shim/preload_syscalls.c 43.92% <0.00%> (-0.94%) ⬇️
src/main/host/descriptor/descriptor.c 74.26% <0.00%> (-0.74%) ⬇️
... and 10 more

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@sporksmith sporksmith enabled auto-merge August 4, 2021 16:14
@sporksmith sporksmith merged commit 4b60308 into shadow:main Aug 4, 2021
@sporksmith sporksmith deleted the fixed-tsc-rate branch August 4, 2021 16:30
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Component: Libraries Support functions like LD_PRELOAD and logging Component: Main Composing the core Shadow executable

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Fully support process-based simulatio...

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new tsc_test fails on my machine

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