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support memory pool page first layout#8061

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huangtingwei9988 wants to merge 14 commits intosgl-project:mainfrom
AniZpZ:host_memory_page_first
Closed

support memory pool page first layout#8061
huangtingwei9988 wants to merge 14 commits intosgl-project:mainfrom
AniZpZ:host_memory_page_first

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@huangtingwei9988 huangtingwei9988 commented Jul 15, 2025

Motivation

Currently, sglang's memory_pool and memory_pool_host are both layer_first layouts, which is conducive to layer wise operations, for example, loading KV caches from host memory to device memory layer by layer.

    def init_kv_buffer(self):
        return torch.empty(
            (
                self.layer_num,
                self.size,
                1,
                self.kv_lora_rank + self.qk_rope_head_dim,
            ),
            dtype=self.dtype,
            device=self.device,
            pin_memory=self.pin_memory,
        )

However, when integrating with a remote kv cache pool like mooncake store, the layer_first layout will make it impossible to obtain the complete kv cache in the continuous address space. (For example, the layer0 caches of all tokens are together, but the layer0 caches of each token are not together with their layer1 caches.)

Therefore, when zero copying, it can only obtain the kv cache by layer. This will cause the number of keys in mooncake store to become layer_num times, which will reduce performance and make it difficult to manage for mooncake store

Co-author @AniZpZ @zhaoyongke @zhangzuo21

Modifications

support memory pool page first layout

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Summary of Changes

Hello @huangtingwei9988, I'm Gemini Code Assist1! I'm currently reviewing this pull request and will post my feedback shortly. In the meantime, here's a summary to help you and other reviewers quickly get up to speed!

This pull request introduces support for a 'page-first' memory layout for KV caches, addressing performance and management challenges encountered when integrating with remote KV cache systems that benefit from contiguous memory blocks. It updates the memory pool management and KV cache transfer mechanisms to be layout-aware, enabling efficient data movement between different memory organizations at the kernel level.

Highlights

  • New Memory Layout Support: Introduced a 'page-first' memory layout for KV caches, alongside the existing 'layer-first' layout, to improve integration with remote KV cache pools like Mooncake store.
  • Flexible KV Cache Transfer: Enhanced KV cache transfer functions (both per-layer and all-layer, and MLA/non-MLA variants) to handle transfers between different memory layouts (layer-first to layer-first, and page-first to layer-first).
  • Layout Dimension Tracking: Added layout_dim properties to memory_pool and memory_pool_host classes to accurately track the dimension of a single layer/page, which is crucial for calculating offsets in the new layout.
  • Kernel-level Layout Awareness: Modified underlying CUDA kernels to accept parameters indicating source and destination memory layouts, allowing them to dynamically select the correct global offset calculation logic (get_global_offset_lf for layer-first, get_global_offset_pf for page-first).
  • Expanded Testing: Added new test cases to verify the correctness of KV cache transfers, specifically including scenarios for converting from a page-first layout to a layer-first layout.
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Code Review

The pull request introduces support for a page-first memory layout, which improves integration with remote KV cache pools. The changes include modifications to Python, C++, and CUDA code to handle different memory layouts. The new functionality is well-tested. I have provided some suggestions to improve readability and maintainability.

Comment thread sgl-kernel/csrc/kvcacheio/transfer.cu
Comment thread sgl-kernel/csrc/kvcacheio/transfer.cu
@AniZpZ AniZpZ force-pushed the host_memory_page_first branch from 8f31c9e to f861882 Compare July 15, 2025 16:27
@xiezhq-hermann xiezhq-hermann self-assigned this Jul 15, 2025
@xiezhq-hermann
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replaced by #8651

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3 participants