This will be built on the foundation of the command line tool in VCU-4A. Its purpose is to validate the state machine task. It is only concerned with the logic (we don’t necessarily care too much about race conditions in the scope of this task). These would essentially be small “unit tests”.
This would help with the vast number of inputs to the state machine and establish some basic but integral regression tests.
Outputs:
Full design doc explaining all design decisions (we want to be very explicit about the capabilities and drawbacks of this simulation)
Be able to do something like ./run_state_tests and either fail or generate a report
This will be built on the foundation of the command line tool in VCU-4A. Its purpose is to validate the state machine task. It is only concerned with the logic (we don’t necessarily care too much about race conditions in the scope of this task). These would essentially be small “unit tests”.
This would help with the vast number of inputs to the state machine and establish some basic but integral regression tests.
Outputs:
Full design doc explaining all design decisions (we want to be very explicit about the capabilities and drawbacks of this simulation)
Be able to do something like ./run_state_tests and either fail or generate a report