Find a way to allow 5 bits for the shift and rotate amounts in the following instructions:

• xc.prot.i
• xc.psll.i
• xc.psrl.i

Could possibly be done by using the pack-width encoding ca||cb||cc = 1?1 and letting cb be the [M|L]SB of the new 5-bit shamt / ramnt field. Any pack width where ca=cc=1 then implies operations on the entire register word.

• Pro: Fits without major encoding structure modifications
• Con: Doesn't line up with RISC-V shamt field
• Con: Makes decode of pack widths somewhat more fiddely, as this becomes a corner case for shift/rotate instructions.