Implement saturating_shl and saturating_shr on ints#103441
Implement saturating_shl and saturating_shr on ints#103441kellerkindt wants to merge 4 commits intorust-lang:masterfrom
saturating_shl and saturating_shr on ints#103441Conversation
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Hey! It looks like you've submitted a new PR for the library teams! If this PR contains changes to any Examples of
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saturating_shl and saturating_shr on ints
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While this is useful functionality, the chosen name is very confusing. Generally, a "saturating shift left" is understood in the same sense as a "saturating multiply", which means that (for the unsigned case) the result is |
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Thanks for replying! So basically, if the most significant bit is set, the return value is set to |
| #[inline(always)] | ||
| pub const fn saturating_shr(self, rhs: u32) -> Self { | ||
| if rhs >= <$SelfT>::BITS { | ||
| 0 |
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Is 0 the correct value here? Shouldn't it do a sign extend?
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Thanks, I am already working on an alternative solution with that in mind, but ./x.py test takes its time this time.
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I believe this can just be self >> rhs.min(<$SelfT>::BITS) as the whole implementation, for both signed and unsigned even.
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Considering this initial implementation accidentally saturated the shift value as opposed to the resulting value (and people are similarly confused in the linked issue), it feels like either the function should be renamed to be clearer in its intention, or at least this should be very clearly pointed out in the documentation. |
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I don't understand why the doctest fails, but outside its fine. |
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The job Click to see the possible cause of the failure (guessed by this bot) |
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I believe this requires an ACP, so please create one (if you haven't already). @rustbot label +T-libs-api -T-libs +S-waiting-on-author -S-waiting-on-review |
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@kellerkindt any updates on this? |
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I might look into it this weekend if I find the time :) |
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Ping from triage: I'm closing this due to inactivity, Please reopen when you are ready to continue with this. @rustbot label: +S-inactive |
Tracking issue #103440
Implementation based on proposed design by @avitex: https://github.com/avitex/rfcs/blob/master/text/0000-saturating-bit-shifts.md