enable unaligned access optimizations for RISC-V with Zicclsm #14342
+2
−1
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While reviewing the Redis code, we discovered that optimizations for unaligned memory accesses are not enabled on RISC-V. After testing siphash separately, we found some performance improvements in this area and hope to add them.
The zicclsm extension, which includes unaligned memory accesses, is required on RISC-V, as specified in the RVA20U64 specification. GCC also provides the macro zicclsm to detect the zicclsm extension.
Supported versions: GCC 14.1.0 and above
Test data
environment information
Test Configuration
Test Iterations: 10,000,000 hashes per run
Test Runs: 10 consecutive runs
Improvement
6482733.40 --> 10732524.90 (+65.5%)
Disable UNALIGNED_LE_CPU
Enable UNALIGNED_LE_CPU