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Pull request overview
This pull request adds ARM architecture support (both 32-bit ARM and 64-bit AARCH64) to the dwarf2 plugin, enabling LAVA bug injection for ARM targets. The changes restructure the existing x86-specific code to be architecture-agnostic and add comprehensive ARM register mappings.
Key changes:
- Added DWARF register name mappings and register index mappings for ARM (32-bit) and AARCH64 (64-bit)
- Reorganized architecture-specific preprocessor directives to support all four architectures: i386, x86_64, ARM, and AARCH64
- Updated ELF architecture detection to recognize ARM and AARCH64 binaries
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Pull request overview
Copilot reviewed 4 out of 4 changed files in this pull request and generated 7 comments.
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lacraig2
approved these changes
Jan 15, 2026
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Your checklist for this pull request
Detailed description
This pull request aims to grant dwarf2 support for ARM. Allowing this support would allow for LAVA to inject bugs into the ARM architecture, see here
ARM
Once I built the executable, I used the following command.
readelf --debug-dump=info test_hc_arm | grep "DW_OP_reg"To confirm that I should not use the aliases, and just stick register numbers, use the command
readelf --debug-dump=frames test_hc_aarch64 | grep -E "RA|CFA"To confirm the macros are identical for i386, I confirmed they both use LSB and are 32-bits.
AARCH64
Once I built the executable, I used the following command.
readelf --debug-dump=info test_hc_aarch64 | grep "DW_OP_reg"To confirm that I should not use the aliases, and just stick register numbers, use the command
readelf --debug-dump=frames test_hc_aarch64 | grep -E "RA|CFA"To confirm that
ELFCLASS64andELFDATA2LSBare correct macros, refer to the screenshots, which show both as 64-bit and LSB-first. Additionally, the update now supports EM_AARCH64, which aligns with the AARCH64 machine architecture....
Test plan
Additionally, I followed the guidance provided here on setting registers and mapping.
https://github.com/panda-re/panda/blob/dev/panda/python/core/pandare/arch.py
I did test using dwarfdump.py on dwarf dump output from AARCH/ARM, and that explains the fixes. But given the static code analysis, it is likely the registers would map correctly on AARCH64 for LAVA.
The test would really be testable once ARM/AARCH64 hypercalls are fixed.
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Closing issues
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