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amd64: Emit 32bit registers for Iconst_int when we can#8990

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damiendoligez merged 1 commit intoocaml:trunkfrom
ctk21:ctk21_amd64_emit_32bit_reg_for_const_when_can
Oct 3, 2019
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amd64: Emit 32bit registers for Iconst_int when we can#8990
damiendoligez merged 1 commit intoocaml:trunkfrom
ctk21:ctk21_amd64_emit_32bit_reg_for_const_when_can

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@ctk21 ctk21 commented Sep 27, 2019

This PR alters how Iconst_int is emitted for x86_64 to use a more compact encoding.

Currently Iconst_int will emit:

48 31 c0                xor    %rax,%rax
48 c7 c0 01 00 00 00    mov    $0x1,%rax

The Intel optimization reference manual recommends using 32bit registers (see section 12.2.1). This PR changes to emit:

31 c0                   xor    %eax,%eax
b8 01 00 00 00          mov    $0x1,%eax

Taking ocamlopt as the binary, this change reduces the text segment size by about 0.75%. I have also run sandmark benchmarks for the change, there was no significant evidence to suggest performance gains or losses. However as a comparison GCC, Clang and ICC are all emitting the 32bit variants.

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ctk21 commented Sep 27, 2019

It's been pointed out that this particular change is one part of the proposed changes in #1490.

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I'm in favor. As I wrote in #1490:

Using movl $n, %R32 instead of movq $n, %R64 when n is in [0...0xFFFF_FFFF] is a clear win: two bytes saved, very common idiom, no risk of performance regression.

@ctk21 ctk21 force-pushed the ctk21_amd64_emit_32bit_reg_for_const_when_can branch from 1131aaa to 9bc1113 Compare September 27, 2019 15:02
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ctk21 commented Sep 27, 2019

I've spoken with @xclerc and @mshinwell. Taken their (better) code in #1490 for emitting 32bit registers for constants.

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Getting even better. Style suggestion below.

…se of (better) code proposed in PR1490 credit to xclerc/mshinwell)
@ctk21 ctk21 force-pushed the ctk21_amd64_emit_32bit_reg_for_const_when_can branch from 9bc1113 to cf112de Compare September 28, 2019 13:28
@damiendoligez damiendoligez merged commit 62d6917 into ocaml:trunk Oct 3, 2019
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3 participants