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Tags: sinara-hw/sinara

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Backplane_Adapter_3U/v1.0

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Kasli/v1.1

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Kasli/v1.1rc3

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Kasli/v1.1rc2

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Kasli v1.1rc2

Clock recovery: un-DNPed balun and DNPed jumpers
FPGA: added heatsink, removed I2C switch reset lines
USB: connected I2C switch reset to CDBUS4 of FTDI, added buffer
Power supplies: updated power calculations
Cleaned up variants
Implemented all changes on PCB
Added via shielding around PCB

Kasli/v1.1rc1

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Verified

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jordens Robert Jördens
GPG key ID: C38D0AAF11329EB8
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3U_VHDCI/1.1rc1

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Kasli v1.0 release

Modified vias under thermal pads
Changed schematic template to include ARTIQ logo

3U_SMA/1.1rc1

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Kasli v1.0 release

Modified vias under thermal pads
Changed schematic template to include ARTIQ logo

3U_SMA/v1.1

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Kasli v1.0 release

Modified vias under thermal pads
Changed schematic template to include ARTIQ logo

3U_BNC/1.1rc1

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Kasli v1.0 release

Modified vias under thermal pads
Changed schematic template to include ARTIQ logo

1.1rc1

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Kasli v1.0 release

Modified vias under thermal pads
Changed schematic template to include ARTIQ logo