diff --git a/clang-tools-extra/test/clang-tidy/checkers/modernize/redundant-void-arg.cpp b/clang-tools-extra/test/clang-tidy/checkers/modernize/redundant-void-arg.cpp
index 89bf7f04f5576..6cf59f91016df 100644
--- a/clang-tools-extra/test/clang-tidy/checkers/modernize/redundant-void-arg.cpp
+++ b/clang-tools-extra/test/clang-tidy/checkers/modernize/redundant-void-arg.cpp
@@ -306,8 +306,8 @@ void gronk::bar(void) {
   // CHECK-MESSAGES: :[[@LINE-2]]:11: warning: {{.*}} in variable declaration
   // CHECK-FIXES:      {{^  }}void (gronk::*p5){{$}}
   // CHECK-FIXES-NEXT: {{^      \($}}
-  // CHECK-FIXES-NExT: {{^          $}}
-  // CHECK-FIXES-NExT: {{^      \);$}}
+  // CHECK-FIXES-NEXT: {{^          $}}
+  // CHECK-FIXES-NEXT: {{^      \);$}}
 }
 
 // intentionally not LLVM style to check preservation of whitespace
diff --git a/clang/test/AST/ast-crash-doc-function-template.cpp b/clang/test/AST/ast-crash-doc-function-template.cpp
index a1627c7b4d545..cb36cd30f2d3a 100644
--- a/clang/test/AST/ast-crash-doc-function-template.cpp
+++ b/clang/test/AST/ast-crash-doc-function-template.cpp
@@ -1,7 +1,7 @@
 // RUN: rm -rf %t
 // RUN: split-file %s %t
 
-// RUN: %clang_cc1 -x c++ -Wdocumentation -ast-dump-all %t/t.cpp
+// RUN: %clang_cc1 -x c++ -Wdocumentation -ast-dump-all %t/t.cpp | FileCheck %s
 
 //--- t.h
 /// MyClass in the header file
diff --git a/clang/test/AST/ast-dump-attr-type.cpp b/clang/test/AST/ast-dump-attr-type.cpp
index 78a3b660bbe60..07337aaaf2590 100644
--- a/clang/test/AST/ast-dump-attr-type.cpp
+++ b/clang/test/AST/ast-dump-attr-type.cpp
@@ -19,6 +19,6 @@ using Ty1 = decltype(y);
 // CHECK-NEXT:   |-DeclRefExpr 0x{{[^ ]*}} <col:22> '__attribute__((address_space(3))) int *' lvalue Var 0x{{[^ ]*}} 'y' '__attribute__((address_space(3))) int *' non_odr_use_unevaluated
 // CHECK-NEXT:     `-PointerType 0x{{[^ ]*}} '__attribute__((address_space(3))) int *'
 // CHECK-NEXT:       `-AttributedType 0x{{[^ ]*}} '__attribute__((address_space(3))) int' sugar
-// CHECK-NEXT          |-BuiltinType 0x{{[^ ]*}} 'int'
-// CHECK-NEXT          `-QualType 0x{{[^ ]*}} '__attribute__((address_space(3))) int' __attribute__((address_space(3)))
-// CHECK-NEXT            `-BuiltinType 0x{{[^ ]*}} 'int'
+// CHECK-NEXT:         |-BuiltinType 0x{{[^ ]*}} 'int'
+// CHECK-NEXT:         `-QualType 0x{{[^ ]*}} '__attribute__((address_space(3))) int' __attribute__((address_space(3)))
+// CHECK-NEXT:           `-BuiltinType 0x{{[^ ]*}} 'int'
diff --git a/clang/test/AST/ast-dump-decl.c b/clang/test/AST/ast-dump-decl.c
index 683df50f7e91c..68428968e02b8 100644
--- a/clang/test/AST/ast-dump-decl.c
+++ b/clang/test/AST/ast-dump-decl.c
@@ -73,7 +73,7 @@ enum TestEnumDeclForward;
 // CHECK:      EnumDecl{{.*}} TestEnumDeclForward
 
 __module_private__ enum TestEnumDeclPrivate;
-// CHECK-MODULE:      EnumDecl{{.*}} TestEnumDeclPrivate __module_private__
+// CHECK-MODULES:      EnumDecl{{.*}} TestEnumDeclPrivate __module_private__
 
 struct TestRecordDecl {
   int i;
@@ -103,7 +103,7 @@ struct TestRecordDeclForward;
 // CHECK:      RecordDecl{{.*}} struct TestRecordDeclForward
 
 __module_private__ struct TestRecordDeclPrivate;
-// CHECK-MODULE:      RecordDecl{{.*}} struct TestRecordDeclPrivate __module_private__
+// CHECK-MODULES:      RecordDecl{{.*}} struct TestRecordDeclPrivate __module_private__
 
 enum testEnumConstantDecl {
   TestEnumConstantDecl,
@@ -163,7 +163,7 @@ struct testFieldDecl {
 // CHECK-NEXT:   ConstantExpr
 // CHECK-NEXT:     value: Int 1
 // CHECK-NEXT:       IntegerLiteral
-// CHECK-MODULE:      FieldDecl{{.*}} TestFieldDeclPrivate 'int' __module_private__
+// CHECK-MODULES:      FieldDecl{{.*}} TestFieldDeclPrivate 'int' __module_private__
 
 int TestVarDecl;
 // CHECK:      VarDecl{{.*}} TestVarDecl 'int'
@@ -175,7 +175,7 @@ __thread int TestVarDeclThread;
 // CHECK:      VarDecl{{.*}} TestVarDeclThread 'int' tls{{$}}
 
 __module_private__ int TestVarDeclPrivate;
-// CHECK-MODULE:      VarDecl{{.*}} TestVarDeclPrivate 'int' __module_private__
+// CHECK-MODULES:      VarDecl{{.*}} TestVarDeclPrivate 'int' __module_private__
 
 int TestVarDeclInit = 0;
 // CHECK:      VarDecl{{.*}} TestVarDeclInit 'int'
diff --git a/clang/test/AST/ast-dump-recovery.cpp b/clang/test/AST/ast-dump-recovery.cpp
index fa6d747556dd8..17e66b2edc316 100644
--- a/clang/test/AST/ast-dump-recovery.cpp
+++ b/clang/test/AST/ast-dump-recovery.cpp
@@ -200,7 +200,7 @@ void InvalidInitalizer(int x) {
   // CHECK:     `-VarDecl {{.*}} a3 'Bar'
   // CHECK-NEXT: `-RecoveryExpr {{.*}} contains-errors
   // CHECK-NEXT:  `-InitListExpr
-  // CHECK-NEDT:   `-DeclRefExpr {{.*}} 'x'
+  // CHECK-NEXT:   `-DeclRefExpr {{.*}} 'x'
   Bar a3{x};
   // CHECK:     `-VarDecl {{.*}} a4 'Bar'
   // CHECK-NEXT: `-ParenListExpr {{.*}} 'NULL TYPE' contains-errors
diff --git a/clang/test/AST/ast-dump-using-template.cpp b/clang/test/AST/ast-dump-using-template.cpp
index 75db5eb5a9d1c..84c60e7327cd2 100644
--- a/clang/test/AST/ast-dump-using-template.cpp
+++ b/clang/test/AST/ast-dump-using-template.cpp
@@ -22,7 +22,7 @@ using A = S<T>;
 // CHECK-NEXT: `-ElaboratedType {{.*}} 'S<T>' sugar dependent
 // CHECK-NEXT:   `-TemplateSpecializationType {{.*}} 'S<T>' dependent
 // CHECK-NEXT:     |-name: 'S':'ns::S' qualified
-// CHECk-NEXT:     | |-UsingShadowDecl {{.+}} ClassTemplate {{.+}} 'S'
+// CHECK-NEXT:     | |-UsingShadowDecl {{.+}} ClassTemplate {{.+}} 'S'
 
 // TemplateName in TemplateArgument.
 template <template <typename> class T> class X {};
@@ -55,4 +55,4 @@ using D = decltype(DeducedTemplateSpecializationT2);
 // CHECK-NEXT:  `-ElaboratedType {{.*}} 'S2<int>' sugar
 // CHECK-NEXT:    `-DeducedTemplateSpecializationType {{.*}} 'S2<int>' sugar
 // CHECK-NEXT:      |-name: 'S2':'ns::S2' qualified
-//CHECk-NEXT:       | |-UsingShadowDecl {{.+}} ClassTemplate {{.+}} 'S2'
+// CHECK-NEXT:      | |-UsingShadowDecl {{.+}} ClassTemplate {{.+}} 'S2'
diff --git a/clang/test/AST/conditionally-trivial-smfs.cpp b/clang/test/AST/conditionally-trivial-smfs.cpp
index 1dc1f6c50efc9..6033606280273 100644
--- a/clang/test/AST/conditionally-trivial-smfs.cpp
+++ b/clang/test/AST/conditionally-trivial-smfs.cpp
@@ -222,61 +222,61 @@ template struct CopyAssignmentCheck<1>;
 // CHECK:             "definitionData": {
 // CHECK-NEXT:          "canConstDefaultInit": true,
 // CHECK-NEXT:          "canPassInRegisters": true,
-// CHECK-NEXT           "copyAssign": {
-// CHECK-NEXT             "hasConstParam": true,
-// CHECK-NEXT             "implicitHasConstParam": true,
-// CHECK-NEXT             "trivial": true,
-// CHECK-NEXT             "userDeclared": true
-// CHECK-NEXT           },
+// CHECK-NEXT:          "copyAssign": {
+// CHECK-NEXT:            "hasConstParam": true,
+// CHECK-NEXT:            "implicitHasConstParam": true,
+// CHECK-NEXT:            "trivial": true,
+// CHECK-NEXT:            "userDeclared": true
+// CHECK-NEXT:          },
 
 // CHECK:               "hasConstexprNonCopyMoveConstructor": true,
-// CHECK-NEXT           "isAggregate": true,
-// CHECK-NEXT           "isEmpty": true,
-// CHECK-NEXT           "isLiteral": true,
-// CHECK-NEXT           "isStandardLayout": true,
-// CHECK-NEXT           "isTrivial": true,
-// CHECK-NEXT           "isTriviallyCopyable": true,
-// CHECK-NEXT           "moveAssign": {},
+// CHECK-NEXT:          "isAggregate": true,
+// CHECK-NEXT:          "isEmpty": true,
+// CHECK-NEXT:          "isLiteral": true,
+// CHECK-NEXT:          "isStandardLayout": true,
+// CHECK-NEXT:          "isTrivial": true,
+// CHECK-NEXT:          "isTriviallyCopyable": true,
+// CHECK-NEXT:          "moveAssign": {},
 
 template struct CopyAssignmentCheck<2>;
 // CHECK:             "kind": "ClassTemplateSpecializationDecl",
 // CHECK:             "definitionData": {
 // CHECK-NEXT:          "canConstDefaultInit": true,
 // CHECK-NEXT:          "canPassInRegisters": true,
-// CHECK-NEXT           "copyAssign": {
-// CHECK-NEXT             "hasConstParam": true,
-// CHECK-NEXT             "implicitHasConstParam": true,
-// CHECK-NEXT             "trivial": true,
-// CHECK-NEXT             "userDeclared": true
-// CHECK-NEXT           },
+// CHECK-NEXT:          "copyAssign": {
+// CHECK-NEXT:            "hasConstParam": true,
+// CHECK-NEXT:            "implicitHasConstParam": true,
+// CHECK-NEXT:            "trivial": true,
+// CHECK-NEXT:            "userDeclared": true
+// CHECK-NEXT:          },
 
 // CHECK:               "hasConstexprNonCopyMoveConstructor": true,
-// CHECK-NEXT           "isAggregate": true,
-// CHECK-NEXT           "isEmpty": true,
-// CHECK-NEXT           "isLiteral": true,
-// CHECK-NEXT           "isStandardLayout": true,
-// CHECK-NEXT           "isTrivial": true,
-// CHECK-NEXT           "isTriviallyCopyable": true,
-// CHECK-NEXT           "moveAssign": {},
+// CHECK-NEXT:          "isAggregate": true,
+// CHECK-NEXT:          "isEmpty": true,
+// CHECK-NEXT:          "isLiteral": true,
+// CHECK-NEXT:          "isStandardLayout": true,
+// CHECK-NEXT:          "isTrivial": true,
+// CHECK-NEXT:          "isTriviallyCopyable": true,
+// CHECK-NEXT:          "moveAssign": {},
 
 template struct CopyAssignmentCheck<3>;
 // CHECK:             "kind": "ClassTemplateSpecializationDecl",
 // CHECK:             "definitionData": {
 // CHECK-NEXT:          "canConstDefaultInit": true,
 // CHECK-NEXT:          "canPassInRegisters": true,
-// CHECK-NEXT           "copyAssign": {
-// CHECK-NEXT             "hasConstParam": true,
-// CHECK-NEXT             "implicitHasConstParam": true,
-// CHECK-NEXT             "trivial": true,
-// CHECK-NEXT             "userDeclared": true
-// CHECK-NEXT           },
+// CHECK-NEXT:          "copyAssign": {
+// CHECK-NEXT:            "hasConstParam": true,
+// CHECK-NEXT:            "implicitHasConstParam": true,
+// CHECK-NEXT:            "trivial": true,
+// CHECK-NEXT:            "userDeclared": true
+// CHECK-NEXT:          },
 
 // CHECK:               "hasConstexprNonCopyMoveConstructor": true,
-// CHECK-NEXT           "isAggregate": true,
-// CHECK-NEXT           "isEmpty": true,
-// CHECK-NEXT           "isLiteral": true,
-// CHECK-NEXT           "isStandardLayout": true,
-// CHECK-NEXT           "moveAssign": {},
+// CHECK-NEXT:          "isAggregate": true,
+// CHECK-NEXT:          "isEmpty": true,
+// CHECK-NEXT:          "isLiteral": true,
+// CHECK-NEXT:          "isStandardLayout": true,
+// CHECK-NEXT:          "moveAssign": {},
 
 template <int N>
 struct MoveAssignmentCheck {
diff --git a/clang/test/Analysis/cast-value-notes.cpp b/clang/test/Analysis/cast-value-notes.cpp
index 7ee224dc6e5d8..12a3d244a144c 100644
--- a/clang/test/Analysis/cast-value-notes.cpp
+++ b/clang/test/Analysis/cast-value-notes.cpp
@@ -77,8 +77,8 @@ void evalReferences(const Shape &S) {
   // expected-note@-2 {{Dereference of null pointer}}
   // expected-warning@-3 {{Dereference of null pointer}}
   clang_analyzer_printState();
-  // XX86-CHECK:      "dynamic_types": [
-  // XX86-CHECK-NEXT:   { "region": "SymRegion{reg_$0<const struct clang::Shape & S>}", "dyn_type": "const class clang::Circle &", "sub_classable": true }
+  // X86-CHECK:      "dynamic_types": [
+  // X86-CHECK-NEXT:   { "region": "SymRegion{reg_$0<const Shape & S>}", "dyn_type": "const class clang::Circle &", "sub_classable": true }
   (void)C;
 }
 #if defined(SUPPRESSED)
diff --git a/clang/test/C/C11/n1311.c b/clang/test/C/C11/n1311.c
index 8ceee74e43af6..fd6cb6a9b09db 100644
--- a/clang/test/C/C11/n1311.c
+++ b/clang/test/C/C11/n1311.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -emit-llvm -o - %s
+// RUN: %clang_cc1 -emit-llvm -o - %s | FileCheck %s
 
 /* WG14 N1311: Yes
  * Initializing static or external variables
diff --git a/clang/test/CodeCompletion/function-overloads.cpp b/clang/test/CodeCompletion/function-overloads.cpp
index 7b8ccef1d580f..b385401a264c5 100644
--- a/clang/test/CodeCompletion/function-overloads.cpp
+++ b/clang/test/CodeCompletion/function-overloads.cpp
@@ -39,7 +39,7 @@ void test_adl() {
 // RUN:    FileCheck -check-prefix=CHECK-CC1 %s
 // CHECK-CC1: OVERLOAD: [#int#]f(<#float x#>, float y)
 // CHECK-CC1: OVERLOAD: [#int#]f(<#int i#>)
-// CHECK-CC1-NOT, CHECK-CC2-NOT: OVERLOAD: A(
+// CHECK-CC1-NOT: CHECK-CC2-NOT: OVERLOAD: A(
 // CHECK-CC2: OVERLOAD: [#int#]f(float x, float y)
 // CHECK-CC2-NOT: OVERLOAD: [#int#]f(int i)
 // CHECK-CC3: OVERLOAD: A(<#int#>, int, int)
diff --git a/clang/test/CodeGen/64bit-swiftcall.c b/clang/test/CodeGen/64bit-swiftcall.c
index 7f8aa02d97ce1..d18c6a9b18963 100644
--- a/clang/test/CodeGen/64bit-swiftcall.c
+++ b/clang/test/CodeGen/64bit-swiftcall.c
@@ -1000,7 +1000,7 @@ typedef struct {
 TEST(padded_alloc_size_vector)
 // X86-64-LABEL: take_padded_alloc_size_vector(<3 x i32> %0, i64 %1)
 // X86-64-NOT: [4 x i8]
-// x86-64: ret void
+// X86-64: ret void
 
 typedef union {
   float f1;
diff --git a/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hadd.c b/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hadd.c
index 92e4c624cd044..df88306bb2195 100644
--- a/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hadd.c
+++ b/clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_hadd.c
@@ -127,7 +127,7 @@ svuint16_t test_svhadd_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2)
 //
 svuint32_t test_svhadd_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2)
 {
-  // CHECKA-LABEL: test_svhadd_u32_m
+  // CHECK-LABEL: test_svhadd_u32_m
   return SVE_ACLE_FUNC(svhadd,_u32,_m,)(pg, op1, op2);
 }
 
@@ -438,7 +438,7 @@ svuint16_t test_svhadd_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2)
 //
 svuint32_t test_svhadd_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2)
 {
-  // CHECKA-LABEL: test_svhadd_u32_z
+  // CHECK-LABEL: test_svhadd_u32_z
   return SVE_ACLE_FUNC(svhadd,_u32,_z,)(pg, op1, op2);
 }
 
@@ -753,7 +753,7 @@ svuint16_t test_svhadd_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2)
 //
 svuint32_t test_svhadd_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2)
 {
-  // CHECKA-LABEL: test_svhadd_u32_x
+  // CHECK-LABEL: test_svhadd_u32_x
   return SVE_ACLE_FUNC(svhadd,_u32,_x,)(pg, op1, op2);
 }
 
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c b/clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c
index 91d1ebd045c58..58c4d291ffb40 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c
@@ -535,7 +535,7 @@ void test1() {
 
   res_vi  = vec_and(vbi, vi);
 // CHECK: and <4 x i32>
-// CHECK-le: and <4 x i32>
+// CHECK-LE: and <4 x i32>
 
   res_vi  = vec_and(vi, vbi);
 // CHECK: and <4 x i32>
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-int128.c b/clang/test/CodeGen/PowerPC/builtins-ppc-int128.c
index c5323c7bfbdf5..1b2258a9a2e4a 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-int128.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-int128.c
@@ -13,27 +13,27 @@ unsigned long long aull[2] = { 1L, 2L };
 
 void testVectorInt128Pack(){
 // CHECK-LABEL: testVectorInt128Pack
-// CHECK-LABEL-LE: testVectorInt128Pack
+// CHECK-LE-LABEL: testVectorInt128Pack
   res_vslll = __builtin_pack_vector_int128(aull[0], aull[1]);
 // CHECK: %[[V1:[0-9]+]] = insertelement <2 x i64> poison, i64 %{{[0-9]+}}, i64 0
 // CHECK-NEXT: %[[V2:[0-9]+]] = insertelement <2 x i64> %[[V1]], i64 %{{[0-9]+}}, i64 1
 
 // CHECK-LE: %[[V1:[0-9]+]] = insertelement <2 x i64> poison, i64 %{{[0-9]+}}, i64 1
-// CHECK-NEXT-LE: %[[V2:[0-9]+]] = insertelement <2 x i64> %[[V1]], i64 %{{[0-9]+}}, i64 0
-// CHECK-NEXT-LE:  bitcast <2 x i64> %[[V2]] to <1 x i128>
+// CHECK-LE-NEXT: %[[V2:[0-9]+]] = insertelement <2 x i64> %[[V1]], i64 %{{[0-9]+}}, i64 0
+// CHECK-LE-NEXT:  bitcast <2 x i64> %[[V2]] to <1 x i128>
 
   __builtin_unpack_vector_int128(res_vslll, 0);
 // CHECK:  %[[V1:[0-9]+]] = bitcast <1 x i128> %{{[0-9]+}} to <2 x i64>
 // CHECK-NEXT: %{{[0-9]+}} = extractelement <2 x i64> %[[V1]], i32 0
 
 // CHECK-LE:  %[[V1:[0-9]+]] = bitcast <1 x i128> %{{[0-9]+}} to <2 x i64>
-// CHECK-NEXT-LE: %{{[0-9]+}} = extractelement <2 x i64> %[[V1]], i32 1
+// CHECK-LE-NEXT: %{{[0-9]+}} = extractelement <2 x i64> %[[V1]], i32 1
 
   __builtin_unpack_vector_int128(res_vslll, 1);
 // CHECK:  %[[V1:[0-9]+]] = bitcast <1 x i128> %{{[0-9]+}} to <2 x i64>
 // CHECK-NEXT: %{{[0-9]+}} = extractelement <2 x i64> %[[V1]], i32 1
 
 // CHECK-LE:  %[[V1:[0-9]+]] = bitcast <1 x i128> %{{[0-9]+}} to <2 x i64>
-// CHECK-NEXT-LE: %{{[0-9]+}} = extractelement <2 x i64> %[[V1]], i32 0
+// CHECK-LE-NEXT: %{{[0-9]+}} = extractelement <2 x i64> %[[V1]], i32 0
 }
 
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c b/clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c
index 435465ebbb4be..83b143a64882d 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-p8vector.c
@@ -1191,7 +1191,7 @@ void test1() {
   res_vsll = vec_neg(vsll);
 // CHECK: sub <2 x i64> zeroinitializer, {{%[0-9]+}}
 // CHECK-LE: sub <2 x i64> zeroinitializer, {{%[0-9]+}}
-// CHECK_PPC: call to 'vec_neg' is ambiguous
+// CHECK-PPC: call to 'vec_neg' is ambiguous
 
 
 }
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c b/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
index b55a522ed2608..932e234875ba1 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
@@ -996,30 +996,30 @@ vector bool long long test87(void) {
 }
 vector unsigned char test88(void) {
 // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-BE-NEXT-NEXT: ret <16 x i8>
+// CHECK-BE-NEXT: ret <16 x i8>
 // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-NEXT-NEXT: ret <16 x i8>
+// CHECK-NEXT: ret <16 x i8>
   return vec_xl_len(uc,0);
 }
 vector signed char test89(void) {
 // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-BE-NEXT-NEXT: ret <16 x i8>
+// CHECK-BE-NEXT: ret <16 x i8>
 // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-NEXT-NEXT: ret <16 x i8>
+// CHECK-NEXT: ret <16 x i8>
   return vec_xl_len(sc,0);
 }
 vector unsigned short test90(void) {
 // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-BE-NEXT-NEXT: ret <8 x i16>
+// CHECK-BE-NEXT: ret <8 x i16>
 // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-NEXT-NEXT: ret <8 x i16>
+// CHECK-NEXT: ret <8 x i16>
   return vec_xl_len(us,0);
 }
 vector signed short test91(void) {
 // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-BE-NEXT-NEXT: ret <8 x i16>
+// CHECK-BE-NEXT: ret <8 x i16>
 // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-NEXT-NEXT: ret <8 x i16>
+// CHECK-NEXT: ret <8 x i16>
   return vec_xl_len(ss,0);
 }
 vector unsigned int test92(void) {
@@ -1040,49 +1040,49 @@ vector signed int test93(void) {
 
 vector float test94(void) {
 // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-BE-NEXT-NEXT: ret <4 x i32>
+// CHECK-BE-NEXT: ret <4 x i32>
 // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-NEXT-NEXT: ret <4 x i32>
+// CHECK-NEXT: ret <4 x i32>
   return vec_xl_len(f,0);
 }
 
 vector unsigned long long test95(void) {
 // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-BE-NEXT-NEXT: ret <2 x i64>
+// CHECK-BE-NEXT: ret <2 x i64>
 // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-NEXT-NEXT: ret <2 x i64>
+// CHECK-NEXT: ret <2 x i64>
   return vec_xl_len(ull,0);
 }
  
 vector signed long long test96(void) {
 // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-BE-NEXT-NEXT: ret <2 x i64>
+// CHECK-BE-NEXT: ret <2 x i64>
 // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-NEXT-NEXT: ret <2 x i64>
+// CHECK-NEXT: ret <2 x i64>
   return vec_xl_len(sll,0);
 }
 
 vector double test97(void) {
 // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-BE-NEXT-NEXT: ret <2 x i64>
+// CHECK-BE-NEXT: ret <2 x i64>
 // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-NEXT-NEXT: ret <2 x i64>
+// CHECK-NEXT: ret <2 x i64>
   return vec_xl_len(d,0);
 }
 
 vector unsigned __int128 test98(void) {
 // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-BE-NEXT-NEXT: ret <1 x i128>
+// CHECK-BE-NEXT: ret <1 x i128>
 // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-NEXT-NEXT: ret <1 x i128>
+// CHECK-NEXT: ret <1 x i128>
   return vec_xl_len(uint128,0);
 }
 
 vector signed __int128 test99(void) {
 // CHECK-BE: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-BE-NEXT-NEXT: ret <1 x i128>
+// CHECK-BE-NEXT: ret <1 x i128>
 // CHECK: @llvm.ppc.vsx.lxvl(ptr %{{.+}}, i64
-// CHECK-NEXT-NEXT: ret <1 x i128>
+// CHECK-NEXT: ret <1 x i128>
   return vec_xl_len(sint128,0);
 }
 
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c b/clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c
index 01fa6c6ad17e0..b72a2f7f9ecfa 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-quadword.c
@@ -69,12 +69,12 @@ void test1() {
   res_vlll = vec_addc(vlll, vlll);
 // CHECK: @llvm.ppc.altivec.vaddcuq
 // CHECK-LE: @llvm.ppc.altivec.vaddcuq
-// KCHECK-PPC: error: call to 'vec_addc' is ambiguous
+// CHECK-PPC: error: call to 'vec_addc' is ambiguous
 
   res_vulll = vec_addc(vulll, vulll);
 // CHECK: @llvm.ppc.altivec.vaddcuq
 // CHECK-LE: @llvm.ppc.altivec.vaddcuq
-// KCHECK-PPC: error: call to 'vec_addc' is ambiguous
+// CHECK-PPC: error: call to 'vec_addc' is ambiguous
 
 
   /* vec_vaddcuq */
@@ -165,12 +165,12 @@ void test1() {
   res_vlll = vec_subc(vlll, vlll);
 // CHECK: @llvm.ppc.altivec.vsubcuq
 // CHECK-LE: @llvm.ppc.altivec.vsubcuq
-// KCHECK-PPC: error: call to 'vec_subc' is ambiguous
+// CHECK-PPC: error: call to 'vec_subc' is ambiguous
 
   res_vulll = vec_subc(vulll, vulll);
 // CHECK: @llvm.ppc.altivec.vsubcuq
 // CHECK-LE: @llvm.ppc.altivec.vsubcuq
-// KCHECK-PPC: error: call to 'vec_subc' is ambiguous
+// CHECK-PPC: error: call to 'vec_subc' is ambiguous
 
   res_vuc = vec_subc_u128(vuc, vuc);
 // CHECK: @llvm.ppc.altivec.vsubcuq
@@ -219,7 +219,7 @@ void test1() {
 // CHECK-LE: store <16 x i8> splat (i8 -1), ptr {{%.+}}, align 16
 // CHECK-LE: xor <16 x i8>
 // CHECK-LE: call <4 x i32> @llvm.ppc.altivec.vperm(<4 x i32> {{%.+}}, <4 x i32> {{%.+}}, <16 x i8> {{%.+}})
-// CHECK_PPC: error: call to 'vec_revb' is ambiguous
+// CHECK-PPC: error: call to 'vec_revb' is ambiguous
 
   /* vec_xl */
   res_vlll = vec_xl(param_sll, &param_lll);
diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c b/clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
index 99524fa2f79d0..1fd3a791cea5e 100644
--- a/clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
+++ b/clang/test/CodeGen/PowerPC/builtins-ppc-vsx.c
@@ -2300,9 +2300,9 @@ vector double xxsldwi_should_not_assert(vector double a, vector double b) {
 // CHECK-NEXT:  bitcast <4 x i32> %{{[0-9]+}} to <2 x double>
 
 // CHECK-LE:  bitcast <2 x double> %{{[0-9]+}} to <4 x i32>
-// CHECK-NEXT-LE:  bitcast <2 x double> %{{[0-9]+}} to <4 x i32>
-// CHECK-NEXT-LE:  shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
-// CHECK-NEXT-LE:  bitcast <4 x i32> %{{[0-9]+}} to <2 x double>
+// CHECK-LE-NEXT:  bitcast <2 x double> %{{[0-9]+}} to <4 x i32>
+// CHECK-LE-NEXT:  shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
+// CHECK-LE-NEXT:  bitcast <4 x i32> %{{[0-9]+}} to <2 x double>
 }
 
 void test_vector_cpsgn_float(vector float a, vector float b) {
diff --git a/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c b/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c
index 40d3839dcf026..fafdf4ed91e2e 100644
--- a/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c
+++ b/clang/test/CodeGen/PowerPC/ppc-tmmintrin.c
@@ -71,7 +71,7 @@ test_alignr() {
 // CHECK-BE: call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int)
 // CHECK-LE: call <16 x i8> @vec_reve(unsigned char vector[16])
 // CHECK-LE: call <16 x i8> @vec_reve(unsigned char vector[16])
-// CHECk-LE: call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int)
+// CHECK-LE: call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int)
 // CHECK-LE: call <16 x i8> @vec_reve(unsigned char vector[16])
 // CHECK: store <16 x i8> zeroinitializer, ptr %{{[0-9a-zA-Z_.]+}}, align 16
 // CHECK: store <2 x i64> zeroinitializer, ptr %{{[0-9a-zA-Z_.]+}}, align 16
diff --git a/clang/test/CodeGen/X86/avx-builtins.c b/clang/test/CodeGen/X86/avx-builtins.c
index cf7c61d871502..ed39862377197 100644
--- a/clang/test/CodeGen/X86/avx-builtins.c
+++ b/clang/test/CodeGen/X86/avx-builtins.c
@@ -1833,14 +1833,14 @@ void test_mm256_storeu_pd(double* A, __m256d B) {
 void test_mm256_storeu_ps(float* A, __m256 B) {
   // CHECK-LABEL: test_mm256_storeu_ps
   // CHECK: store <8 x float> %{{.*}}, ptr %{{.*}}, align 1{{$}}
-  // CHECk-NEXT: ret void
+  // CHECK-NEXT: ret void
   _mm256_storeu_ps(A, B);
 }
 
 void test_mm256_storeu_si256(__m256i* A, __m256i B) {
   // CHECK-LABEL: test_mm256_storeu_si256
   // CHECK: store <4 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}}
-  // CHECk-NEXT: ret void
+  // CHECK-NEXT: ret void
   _mm256_storeu_si256(A, B);
 }
 
diff --git a/clang/test/CodeGen/X86/avx512vl-builtins.c b/clang/test/CodeGen/X86/avx512vl-builtins.c
index 1c2d467a47428..41368e675b562 100644
--- a/clang/test/CodeGen/X86/avx512vl-builtins.c
+++ b/clang/test/CodeGen/X86/avx512vl-builtins.c
@@ -7021,8 +7021,8 @@ void test_mm256_mask_store_ps(void *__P, __mmask8 __U, __m256 __A) {
 }
 
 void test_mm_storeu_epi64(void *__p, __m128i __a) {
-  // check-label: @test_mm_storeu_epi64
-  // check: store <2 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}}
+  // CHECK-LABEL: @test_mm_storeu_epi64
+  // CHECK: store <2 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}}
   return _mm_storeu_epi64(__p, __a);
 }
 
diff --git a/clang/test/CodeGen/X86/avx512vlbw-builtins.c b/clang/test/CodeGen/X86/avx512vlbw-builtins.c
index 4ec499caabf04..57e36a9ba93d9 100644
--- a/clang/test/CodeGen/X86/avx512vlbw-builtins.c
+++ b/clang/test/CodeGen/X86/avx512vlbw-builtins.c
@@ -2570,8 +2570,8 @@ __m256i test_mm256_maskz_loadu_epi8(__mmask32 __U, void const *__P) {
 }
 
 void test_mm_storeu_epi16(void *__p, __m128i __a) {
-  // check-label: @test_mm_storeu_epi16
-  // check: store <2 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}}
+  // CHECK-LABEL: @test_mm_storeu_epi16
+  // CHECK: store <2 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}}
   return _mm_storeu_epi16(__p, __a);
 }
 
@@ -2594,8 +2594,8 @@ void test_mm256_mask_storeu_epi16(void *__P, __mmask16 __U, __m256i __A) {
 }
 
 void test_mm_storeu_epi8(void *__p, __m128i __a) {
-  // check-label: @test_mm_storeu_epi8
-  // check: store <2 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}}
+  // CHECK-LABEL: @test_mm_storeu_epi8
+  // CHECK: store <2 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}}
   return _mm_storeu_epi8(__p, __a);
 }
 
diff --git a/clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_dup_neonq.c b/clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_dup_neonq.c
index 516e9aba9849a..3e7057367f2da 100644
--- a/clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_dup_neonq.c
+++ b/clang/test/CodeGen/aarch64_neon_sve_bridge_intrinsics/acle_neon_sve_bridge_dup_neonq.c
@@ -158,9 +158,9 @@ svfloat16_t test_svdup_neonq_f16(float16x8_t n) {
   return SVE_ACLE_FUNC(svdup_neonq, _f16, , )(n);
 }
 
-// CHECK-NEXT  %0 = call <vscale x 4 x float> @llvm.vector.insert.nxv4f32.v4f32(<vscale x 4 x float> poison, <4 x float> %n, i64 0)
-// CHECK-NEXT  %1 = call <vscale x 4 x float> @llvm.aarch64.sve.dupq.lane.nxv4f32(<vscale x 4 x float> %0, i64 0)
-// CHECK-NEXT  ret <vscale x 4 x float> %1
+// CHECK-NEXT: %0 = call <vscale x 4 x float> @llvm.vector.insert.nxv4f32.v4f32(<vscale x 4 x float> poison, <4 x float> %n, i64 0)
+// CHECK-NEXT: %1 = call <vscale x 4 x float> @llvm.aarch64.sve.dupq.lane.nxv4f32(<vscale x 4 x float> %0, i64 0)
+// CHECK-NEXT: ret <vscale x 4 x float> %1
 // CHECK-LABEL: @test_svdup_neonq_f32(
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x float> @llvm.vector.insert.nxv4f32.v4f32(<vscale x 4 x float> poison, <4 x float> [[N:%.*]], i64 0)
diff --git a/clang/test/CodeGen/arithmetic-fence-builtin.c b/clang/test/CodeGen/arithmetic-fence-builtin.c
index 5339b2061d6bd..3cc8964ce4404 100644
--- a/clang/test/CodeGen/arithmetic-fence-builtin.c
+++ b/clang/test/CodeGen/arithmetic-fence-builtin.c
@@ -64,14 +64,14 @@ int addit(float a, float b) {
 
   b = (a);
   (a) = b;
-  // CHECK-NEXT fptosi
-  // CHECK-NEXT store i32
-  // CHECK-NEXT load float
-  // CHECK-NEXT store float
-  // CHECK-NEXT load float
-  // CHECK-NEXT store float
+  // CHECK-NEXT: fptosi
+  // CHECK-NEXT: store i32
+  // CHECK-NEXT: load float
+  // CHECK-NEXT: store float
+  // CHECK-NEXT: load float
+  // CHECK-NEXT: store float
   return 0;
-  // CHECK-NEXT ret i32 0
+  // CHECK-NEXT: ret i32 0
 }
 int addit1(int a, int b) {
   // CHECK: define {{.*}}@addit1(i32 noundef %a, i32 noundef %b{{.*}}
diff --git a/clang/test/CodeGen/arithmetic-fence-builtin.cpp b/clang/test/CodeGen/arithmetic-fence-builtin.cpp
index a8f434c1d60c3..56950d5ee1a0b 100644
--- a/clang/test/CodeGen/arithmetic-fence-builtin.cpp
+++ b/clang/test/CodeGen/arithmetic-fence-builtin.cpp
@@ -27,7 +27,7 @@ int addit(float a, float b) {
   // CHECK-NEXT:  store float [[CALL2]], ptr [[AF]], align 4
 
   return 0;
-  // CHECK-NEXT ret i32 0
+  // CHECK-NEXT: ret i32 0
 }
 
   // CHECK-LABEL: define linkonce_odr noundef float @_Z5addAFIfET_S0_S0_(float noundef {{.*}}, float noundef {{.*}})
diff --git a/clang/test/CodeGen/arm-bf16-reinterpret-intrinsics.c b/clang/test/CodeGen/arm-bf16-reinterpret-intrinsics.c
index f8c3a94133131..38c170bf168cf 100644
--- a/clang/test/CodeGen/arm-bf16-reinterpret-intrinsics.c
+++ b/clang/test/CodeGen/arm-bf16-reinterpret-intrinsics.c
@@ -153,10 +153,10 @@ bfloat16x4_t test_vreinterpret_bf16_p64(poly64x1_t a)   { return vreinterpret_bf
 bfloat16x8_t test_vreinterpretq_bf16_p64(poly64x2_t a)  { return vreinterpretq_bf16_p64(a);  }
 
 // TODO: poly128_t not implemented on aarch32
-// CHCK-LABEL: @test_vreinterpretq_bf16_p128(
-// CHCK-NEXT:  entry:
-// CHCK-NEXT:    [[TMP0:%.*]] = bitcast i128 [[A:%.*]] to <4 x i32>
-// CHCK-NEXT:    ret <4 x i32> [[TMP0]]
+// COM: CHECK-LABEL: @test_vreinterpretq_bf16_p128(
+// COM: CHECK-NEXT:  entry:
+// COM: CHECK-NEXT:    [[TMP0:%.*]] = bitcast i128 [[A:%.*]] to <4 x i32>
+// COM: CHECK-NEXT:    ret <4 x i32> [[TMP0]]
 //
 //bfloat16x8_t test_vreinterpretq_bf16_p128(poly128_t a)  { return vreinterpretq_bf16_p128(a); }
 
@@ -306,9 +306,9 @@ int64x2_t   test_vreinterpretq_s64_bf16(bfloat16x8_t a)  { return vreinterpretq_
 poly64x2_t  test_vreinterpretq_p64_bf16(bfloat16x8_t a)  { return vreinterpretq_p64_bf16(a);  }
 
 // TODO: poly128_t not implemented on aarch32
-// CHCK-LABEL: @test_vreinterpretq_p128_bf16(
-// CHCK-NEXT:  entry:
-// CHCK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to i128
-// CHCK-NEXT:    ret i128 [[TMP0]]
+// COM: CHECK-LABEL: @test_vreinterpretq_p128_bf16(
+// COM: CHECK-NEXT:  entry:
+// COM: CHECK-NEXT:    [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to i128
+// COM: CHECK-NEXT:    ret i128 [[TMP0]]
 //
 //poly128_t   test_vreinterpretq_p128_bf16(bfloat16x8_t a) { return vreinterpretq_p128_bf16(a); }
diff --git a/clang/test/CodeGen/arm-metadata.c b/clang/test/CodeGen/arm-metadata.c
index 4f3e2dba219b6..93e50e80dd2ce 100644
--- a/clang/test/CodeGen/arm-metadata.c
+++ b/clang/test/CodeGen/arm-metadata.c
@@ -8,5 +8,5 @@
 // SHORT-WCHAR: !{{[0-9]+}} = !{i32 1, !"wchar_size", i32 2}
 // SHORT-WCHAR:   !{{[0-9]+}} = !{i32 1, !"min_enum_size", i32 4}
 
-// SHORT_ENUM:  !{{[0-9]+}} = !{i32 1, !"wchar_size", i32 4}
+// SHORT-ENUM:  !{{[0-9]+}} = !{i32 1, !"wchar_size", i32 4}
 // SHORT-ENUM:  !{{[0-9]+}} = !{i32 1, !"min_enum_size", i32 1}
diff --git a/clang/test/CodeGen/arm-poly-add.c b/clang/test/CodeGen/arm-poly-add.c
index 201a03a5bc8b6..b782ef01b00f7 100644
--- a/clang/test/CodeGen/arm-poly-add.c
+++ b/clang/test/CodeGen/arm-poly-add.c
@@ -74,13 +74,13 @@ poly64x2_t test_vaddq_p64(poly64x2_t a, poly64x2_t b){
 }
 
 // TODO: poly128_t not implemented on aarch32
-// CHCK-LABEL: @test_vaddq_p128(
-// CHCK-NEXT:  entry:
-// CHCK-NEXT:    [[TMP0:%.*]] = bitcast i128 [[A:%.*]] to <16 x i8>
-// CHCK-NEXT:    [[TMP1:%.*]] = bitcast i128 [[B:%.*]] to <16 x i8>
-// CHCK-NEXT:    [[TMP2:%.*]] = xor <16 x i8> [[TMP0]], [[TMP1]]
-// CHCK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to i128
-// CHCK-NEXT:    ret i128 [[TMP3]]
+// COM: CHECK-LABEL: @test_vaddq_p128(
+// COM: CHECK-NEXT:  entry:
+// COM: CHECK-NEXT:    [[TMP0:%.*]] = bitcast i128 [[A:%.*]] to <16 x i8>
+// COM: CHECK-NEXT:    [[TMP1:%.*]] = bitcast i128 [[B:%.*]] to <16 x i8>
+// COM: CHECK-NEXT:    [[TMP2:%.*]] = xor <16 x i8> [[TMP0]], [[TMP1]]
+// COM: CHECK-NEXT:    [[TMP3:%.*]] = bitcast <16 x i8> [[TMP2]] to i128
+// COM: CHECK-NEXT:    ret i128 [[TMP3]]
 //
 //poly128_t test_vaddq_p128 (poly128_t a, poly128_t b){
 //  return vaddq_p128(a, b);
diff --git a/clang/test/CodeGen/arm64_vdup.c b/clang/test/CodeGen/arm64_vdup.c
index f81ee50314950..7f6353286eee6 100644
--- a/clang/test/CodeGen/arm64_vdup.c
+++ b/clang/test/CodeGen/arm64_vdup.c
@@ -18,13 +18,13 @@ void test_vdup_lane_u64(uint64x1_t a1) {
 }
 
 // uncomment out the following code once scalar_to_vector in the backend
-// works (for 64 bit?).  Change the "CHECK@" to "CHECK<colon>"
+// works (for 64 bit?). Remove COM<colon>
 /*
 float64x1_t test_vdup_n_f64(float64_t a1) {
-  // CHECK-LABEL@ test_vdup_n_f64
+  // COM: CHECK-LABEL: test_vdup_n_f64
   return vdup_n_f64(a1);
   // match that an element is inserted into part 0
-  // CHECK@ insertelement {{.*, i32 0 *$}}
+  // COM: CHECK: insertelement {{.*, i32 0 *$}}
 }
 */
 
diff --git a/clang/test/CodeGen/attr-arm-sve-vector-bits-types.c b/clang/test/CodeGen/attr-arm-sve-vector-bits-types.c
index c6d5d2d2cffdc..214bc45ec25ec 100644
--- a/clang/test/CodeGen/attr-arm-sve-vector-bits-types.c
+++ b/clang/test/CodeGen/attr-arm-sve-vector-bits-types.c
@@ -308,60 +308,60 @@ void f() {
 // CHECK-128-NEXT: @global_bool ={{.*}} global <2 x i8> zeroinitializer, align 2
 
 // CHECK-256:      @global_i8 ={{.*}} global <32 x i8> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_i16 ={{.*}} global <16 x i16> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_i32 ={{.*}} global <8 x i32> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_i64 ={{.*}} global <4 x i64> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_u8 ={{.*}} global <32 x i8> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_u16 ={{.*}} global <16 x i16> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_u32 ={{.*}} global <8 x i32> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_u64 ={{.*}} global <4 x i64> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_f16 ={{.*}} global <16 x half> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_f32 ={{.*}} global <8 x float> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_f64 ={{.*}} global <4 x double> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_bf16 ={{.*}} global <16 x bfloat> zeroinitializer, align 16
-// CHECK-NEXT-256: @global_bool ={{.*}} global <4 x i8> zeroinitializer, align 2
+// CHECK-256-NEXT: @global_i16 ={{.*}} global <16 x i16> zeroinitializer, align 16
+// CHECK-256-NEXT: @global_i32 ={{.*}} global <8 x i32> zeroinitializer, align 16
+// CHECK-256-NEXT: @global_i64 ={{.*}} global <4 x i64> zeroinitializer, align 16
+// CHECK-256-NEXT: @global_u8 ={{.*}} global <32 x i8> zeroinitializer, align 16
+// CHECK-256-NEXT: @global_u16 ={{.*}} global <16 x i16> zeroinitializer, align 16
+// CHECK-256-NEXT: @global_u32 ={{.*}} global <8 x i32> zeroinitializer, align 16
+// CHECK-256-NEXT: @global_u64 ={{.*}} global <4 x i64> zeroinitializer, align 16
+// CHECK-256-NEXT: @global_f16 ={{.*}} global <16 x half> zeroinitializer, align 16
+// CHECK-256-NEXT: @global_f32 ={{.*}} global <8 x float> zeroinitializer, align 16
+// CHECK-256-NEXT: @global_f64 ={{.*}} global <4 x double> zeroinitializer, align 16
+// CHECK-256-NEXT: @global_bf16 ={{.*}} global <16 x bfloat> zeroinitializer, align 16
+// CHECK-256-NEXT: @global_bool ={{.*}} global <4 x i8> zeroinitializer, align 2
 
 // CHECK-512:      @global_i8 ={{.*}} global <64 x i8> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_i16 ={{.*}} global <32 x i16> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_i32 ={{.*}} global <16 x i32> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_i64 ={{.*}} global <8 x i64> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_u8 ={{.*}} global <64 x i8> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_u16 ={{.*}} global <32 x i16> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_u32 ={{.*}} global <16 x i32> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_u64 ={{.*}} global <8 x i64> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_f16 ={{.*}} global <32 x half> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_f32 ={{.*}} global <16 x float> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_f64 ={{.*}} global <8 x double> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_bf16 ={{.*}} global <32 x bfloat> zeroinitializer, align 16
-// CHECK-NEXT-512: @global_bool ={{.*}} global <8 x i8> zeroinitializer, align 2
+// CHECK-512-NEXT: @global_i16 ={{.*}} global <32 x i16> zeroinitializer, align 16
+// CHECK-512-NEXT: @global_i32 ={{.*}} global <16 x i32> zeroinitializer, align 16
+// CHECK-512-NEXT: @global_i64 ={{.*}} global <8 x i64> zeroinitializer, align 16
+// CHECK-512-NEXT: @global_u8 ={{.*}} global <64 x i8> zeroinitializer, align 16
+// CHECK-512-NEXT: @global_u16 ={{.*}} global <32 x i16> zeroinitializer, align 16
+// CHECK-512-NEXT: @global_u32 ={{.*}} global <16 x i32> zeroinitializer, align 16
+// CHECK-512-NEXT: @global_u64 ={{.*}} global <8 x i64> zeroinitializer, align 16
+// CHECK-512-NEXT: @global_f16 ={{.*}} global <32 x half> zeroinitializer, align 16
+// CHECK-512-NEXT: @global_f32 ={{.*}} global <16 x float> zeroinitializer, align 16
+// CHECK-512-NEXT: @global_f64 ={{.*}} global <8 x double> zeroinitializer, align 16
+// CHECK-512-NEXT: @global_bf16 ={{.*}} global <32 x bfloat> zeroinitializer, align 16
+// CHECK-512-NEXT: @global_bool ={{.*}} global <8 x i8> zeroinitializer, align 2
 
 // CHECK-1024:      @global_i8 ={{.*}} global <128 x i8> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_i16 ={{.*}} global <64 x i16> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_i32 ={{.*}} global <32 x i32> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_i64 ={{.*}} global <16 x i64> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_u8 ={{.*}} global <128 x i8> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_u16 ={{.*}} global <64 x i16> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_u32 ={{.*}} global <32 x i32> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_u64 ={{.*}} global <16 x i64> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_f16 ={{.*}} global <64 x half> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_f32 ={{.*}} global <32 x float> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_f64 ={{.*}} global <16 x double> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_bf16 ={{.*}} global <64 x bfloat> zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_bool ={{.*}} global <16 x i8> zeroinitializer, align 2
+// CHECK-1024-NEXT: @global_i16 ={{.*}} global <64 x i16> zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_i32 ={{.*}} global <32 x i32> zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_i64 ={{.*}} global <16 x i64> zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_u8 ={{.*}} global <128 x i8> zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_u16 ={{.*}} global <64 x i16> zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_u32 ={{.*}} global <32 x i32> zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_u64 ={{.*}} global <16 x i64> zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_f16 ={{.*}} global <64 x half> zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_f32 ={{.*}} global <32 x float> zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_f64 ={{.*}} global <16 x double> zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_bf16 ={{.*}} global <64 x bfloat> zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_bool ={{.*}} global <16 x i8> zeroinitializer, align 2
 
 // CHECK-2048:      @global_i8 ={{.*}} global <256 x i8> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_i16 ={{.*}} global <128 x i16> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_i32 ={{.*}} global <64 x i32> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_i64 ={{.*}} global <32 x i64> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_u8 ={{.*}} global <256 x i8> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_u16 ={{.*}} global <128 x i16> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_u32 ={{.*}} global <64 x i32> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_u64 ={{.*}} global <32 x i64> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_f16 ={{.*}} global <128 x half> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_f32 ={{.*}} global <64 x float> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_f64 ={{.*}} global <32 x double> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_bf16 ={{.*}} global <128 x bfloat> zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_bool ={{.*}} global <32 x i8> zeroinitializer, align 2
+// CHECK-2048-NEXT: @global_i16 ={{.*}} global <128 x i16> zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_i32 ={{.*}} global <64 x i32> zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_i64 ={{.*}} global <32 x i64> zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_u8 ={{.*}} global <256 x i8> zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_u16 ={{.*}} global <128 x i16> zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_u32 ={{.*}} global <64 x i32> zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_u64 ={{.*}} global <32 x i64> zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_f16 ={{.*}} global <128 x half> zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_f32 ={{.*}} global <64 x float> zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_f64 ={{.*}} global <32 x double> zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_bf16 ={{.*}} global <128 x bfloat> zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_bool ={{.*}} global <32 x i8> zeroinitializer, align 2
 
 //===----------------------------------------------------------------------===//
 // Global arrays
@@ -381,60 +381,60 @@ void f() {
 // CHECK-128-NEXT: @global_arr_bool ={{.*}} global [3 x <2 x i8>] zeroinitializer, align 2
 
 // CHECK-256:      @global_arr_i8 ={{.*}} global [3 x <32 x i8>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_i16 ={{.*}} global [3 x <16 x i16>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_i32 ={{.*}} global [3 x <8 x i32>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_i64 ={{.*}} global [3 x <4 x i64>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_u8 ={{.*}} global [3 x <32 x i8>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_u16 ={{.*}} global [3 x <16 x i16>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_u32 ={{.*}} global [3 x <8 x i32>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_u64 ={{.*}} global [3 x <4 x i64>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_f16 ={{.*}} global [3 x <16 x half>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_f32 ={{.*}} global [3 x <8 x float>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_f64 ={{.*}} global [3 x <4 x double>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_bf16 ={{.*}} global [3 x <16 x bfloat>] zeroinitializer, align 16
-// CHECK-NEXT-256: @global_arr_bool ={{.*}} global [3 x <4 x i8>] zeroinitializer, align 2
+// CHECK-256-NEXT: @global_arr_i16 ={{.*}} global [3 x <16 x i16>] zeroinitializer, align 16
+// CHECK-256-NEXT: @global_arr_i32 ={{.*}} global [3 x <8 x i32>] zeroinitializer, align 16
+// CHECK-256-NEXT: @global_arr_i64 ={{.*}} global [3 x <4 x i64>] zeroinitializer, align 16
+// CHECK-256-NEXT: @global_arr_u8 ={{.*}} global [3 x <32 x i8>] zeroinitializer, align 16
+// CHECK-256-NEXT: @global_arr_u16 ={{.*}} global [3 x <16 x i16>] zeroinitializer, align 16
+// CHECK-256-NEXT: @global_arr_u32 ={{.*}} global [3 x <8 x i32>] zeroinitializer, align 16
+// CHECK-256-NEXT: @global_arr_u64 ={{.*}} global [3 x <4 x i64>] zeroinitializer, align 16
+// CHECK-256-NEXT: @global_arr_f16 ={{.*}} global [3 x <16 x half>] zeroinitializer, align 16
+// CHECK-256-NEXT: @global_arr_f32 ={{.*}} global [3 x <8 x float>] zeroinitializer, align 16
+// CHECK-256-NEXT: @global_arr_f64 ={{.*}} global [3 x <4 x double>] zeroinitializer, align 16
+// CHECK-256-NEXT: @global_arr_bf16 ={{.*}} global [3 x <16 x bfloat>] zeroinitializer, align 16
+// CHECK-256-NEXT: @global_arr_bool ={{.*}} global [3 x <4 x i8>] zeroinitializer, align 2
 
 // CHECK-512:      @global_arr_i8 ={{.*}} global [3 x <64 x i8>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_i16 ={{.*}} global [3 x <32 x i16>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_i32 ={{.*}} global [3 x <16 x i32>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_i64 ={{.*}} global [3 x <8 x i64>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_u8 ={{.*}} global [3 x <64 x i8>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_u16 ={{.*}} global [3 x <32 x i16>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_u32 ={{.*}} global [3 x <16 x i32>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_u64 ={{.*}} global [3 x <8 x i64>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_f16 ={{.*}} global [3 x <32 x half>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_f32 ={{.*}} global [3 x <16 x float>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_f64 ={{.*}} global [3 x <8 x double>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_bf16 ={{.*}} global [3 x <32 x bfloat>] zeroinitializer, align 16
-// CHECK-NEXT-512: @global_arr_bool ={{.*}} global [3 x <8 x i8>] zeroinitializer, align 2
+// CHECK-512-NEXT: @global_arr_i16 ={{.*}} global [3 x <32 x i16>] zeroinitializer, align 16
+// CHECK-512-NEXT: @global_arr_i32 ={{.*}} global [3 x <16 x i32>] zeroinitializer, align 16
+// CHECK-512-NEXT: @global_arr_i64 ={{.*}} global [3 x <8 x i64>] zeroinitializer, align 16
+// CHECK-512-NEXT: @global_arr_u8 ={{.*}} global [3 x <64 x i8>] zeroinitializer, align 16
+// CHECK-512-NEXT: @global_arr_u16 ={{.*}} global [3 x <32 x i16>] zeroinitializer, align 16
+// CHECK-512-NEXT: @global_arr_u32 ={{.*}} global [3 x <16 x i32>] zeroinitializer, align 16
+// CHECK-512-NEXT: @global_arr_u64 ={{.*}} global [3 x <8 x i64>] zeroinitializer, align 16
+// CHECK-512-NEXT: @global_arr_f16 ={{.*}} global [3 x <32 x half>] zeroinitializer, align 16
+// CHECK-512-NEXT: @global_arr_f32 ={{.*}} global [3 x <16 x float>] zeroinitializer, align 16
+// CHECK-512-NEXT: @global_arr_f64 ={{.*}} global [3 x <8 x double>] zeroinitializer, align 16
+// CHECK-512-NEXT: @global_arr_bf16 ={{.*}} global [3 x <32 x bfloat>] zeroinitializer, align 16
+// CHECK-512-NEXT: @global_arr_bool ={{.*}} global [3 x <8 x i8>] zeroinitializer, align 2
 
 // CHECK-1024:      @global_arr_i8 ={{.*}} global [3 x <128 x i8>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_i16 ={{.*}} global [3 x <64 x i16>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_i32 ={{.*}} global [3 x <32 x i32>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_i64 ={{.*}} global [3 x <16 x i64>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_u8 ={{.*}} global [3 x <128 x i8>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_u16 ={{.*}} global [3 x <64 x i16>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_u32 ={{.*}} global [3 x <32 x i32>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_u64 ={{.*}} global [3 x <16 x i64>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_f16 ={{.*}} global [3 x <64 x half>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_f32 ={{.*}} global [3 x <32 x float>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_f64 ={{.*}} global [3 x <16 x double>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_bf16 ={{.*}} global [3 x <64 x bfloat>] zeroinitializer, align 16
-// CHECK-NEXT-1024: @global_arr_bool ={{.*}} global [3 x <16 x i8>] zeroinitializer, align 2
+// CHECK-1024-NEXT: @global_arr_i16 ={{.*}} global [3 x <64 x i16>] zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_arr_i32 ={{.*}} global [3 x <32 x i32>] zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_arr_i64 ={{.*}} global [3 x <16 x i64>] zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_arr_u8 ={{.*}} global [3 x <128 x i8>] zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_arr_u16 ={{.*}} global [3 x <64 x i16>] zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_arr_u32 ={{.*}} global [3 x <32 x i32>] zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_arr_u64 ={{.*}} global [3 x <16 x i64>] zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_arr_f16 ={{.*}} global [3 x <64 x half>] zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_arr_f32 ={{.*}} global [3 x <32 x float>] zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_arr_f64 ={{.*}} global [3 x <16 x double>] zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_arr_bf16 ={{.*}} global [3 x <64 x bfloat>] zeroinitializer, align 16
+// CHECK-1024-NEXT: @global_arr_bool ={{.*}} global [3 x <16 x i8>] zeroinitializer, align 2
 
 // CHECK-2048:      @global_arr_i8 ={{.*}} global [3 x <256 x i8>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_i16 ={{.*}} global [3 x <128 x i16>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_i32 ={{.*}} global [3 x <64 x i32>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_i64 ={{.*}} global [3 x <32 x i64>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_u8 ={{.*}} global [3 x <256 x i8>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_u16 ={{.*}} global [3 x <128 x i16>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_u32 ={{.*}} global [3 x <64 x i32>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_u64 ={{.*}} global [3 x <32 x i64>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_f16 ={{.*}} global [3 x <128 x half>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_f32 ={{.*}} global [3 x <64 x float>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_f64 ={{.*}} global [3 x <32 x double>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_bf16 ={{.*}} global [3 x <128 x bfloat>] zeroinitializer, align 16
-// CHECK-NEXT-2048: @global_arr_bool ={{.*}} global [3 x <32 x i8>] zeroinitializer, align 2
+// CHECK-2048-NEXT: @global_arr_i16 ={{.*}} global [3 x <128 x i16>] zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_arr_i32 ={{.*}} global [3 x <64 x i32>] zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_arr_i64 ={{.*}} global [3 x <32 x i64>] zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_arr_u8 ={{.*}} global [3 x <256 x i8>] zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_arr_u16 ={{.*}} global [3 x <128 x i16>] zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_arr_u32 ={{.*}} global [3 x <64 x i32>] zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_arr_u64 ={{.*}} global [3 x <32 x i64>] zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_arr_f16 ={{.*}} global [3 x <128 x half>] zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_arr_f32 ={{.*}} global [3 x <64 x float>] zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_arr_f64 ={{.*}} global [3 x <32 x double>] zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_arr_bf16 ={{.*}} global [3 x <128 x bfloat>] zeroinitializer, align 16
+// CHECK-2048-NEXT: @global_arr_bool ={{.*}} global [3 x <32 x i8>] zeroinitializer, align 2
 
 //===----------------------------------------------------------------------===//
 // Local variables
diff --git a/clang/test/CodeGen/attr-mustprogress.c b/clang/test/CodeGen/attr-mustprogress.c
index 2e8b871912e36..6acdd659bbfd2 100644
--- a/clang/test/CodeGen/attr-mustprogress.c
+++ b/clang/test/CodeGen/attr-mustprogress.c
@@ -30,7 +30,7 @@ int b = 0;
 // CHECK:       for.cond:
 // C99-NOT:       br {{.*}}!llvm.loop
 // C11-NOT:       br {{.*}}!llvm.loop
-// FINITE-NOR:    br {{.*}}!llvm.loop
+// FINITE-NOT:    br {{.*}}!llvm.loop
 //
 void f0(void) {
   for (; ;) ;
diff --git a/clang/test/CodeGen/constantexpr-fneg.c b/clang/test/CodeGen/constantexpr-fneg.c
index fb7a3d1a69539..df86f946ba84d 100644
--- a/clang/test/CodeGen/constantexpr-fneg.c
+++ b/clang/test/CodeGen/constantexpr-fneg.c
@@ -4,7 +4,7 @@
 // Test case for PR45426. Make sure we do not crash while writing bitcode
 // containing a simplify-able fneg constant expression.
 //
-// CHECK-LABEL define i32 @main()
+// CHECK-LABEL: define{{.*}} i32 @main()
 // CHECK:      entry:
 // CHECK-NEXT:   %retval = alloca i32
 // CHECK-NEXT:   store i32 0, ptr %retval
diff --git a/clang/test/CodeGen/debug-info-macro.c b/clang/test/CodeGen/debug-info-macro.c
index 23fd67515e845..e5880c8496914 100644
--- a/clang/test/CodeGen/debug-info-macro.c
+++ b/clang/test/CodeGen/debug-info-macro.c
@@ -10,7 +10,7 @@
 // This test checks that macro Debug info is correctly generated.
 
 // TODO: Check for an following entry once support macros defined in pch files.
-// -PCH: !DIMacro(type: DW_MACINFO_define, name: "C3", value: "1")>
+// COM: PCH: !DIMacro(type: DW_MACINFO_define, name: "C3", value: "1")>
 
 #line 15
 /*Line 15*/ #define D1 1
diff --git a/clang/test/CodeGen/ffp-contract-option.c b/clang/test/CodeGen/ffp-contract-option.c
index 2a6443032a4e6..55fd0884f9609 100644
--- a/clang/test/CodeGen/ffp-contract-option.c
+++ b/clang/test/CodeGen/ffp-contract-option.c
@@ -112,8 +112,8 @@ float mymuladd(float x, float y, float z) {
   // CHECK-FPC-OFF: load float, ptr
   // CHECK-FPC-OFF: fadd float {{.*}}, {{.*}}
 
-  // CHECK-FFPC-OFF: load float, ptr
-  // CHECK-FFPC-OFF: load float, ptr
+  // CHECK-FPSC-OFF: load float, ptr
+  // CHECK-FPSC-OFF: load float, ptr
   // CHECK-FPSC-OFF: call float @llvm.experimental.constrained.fmul.f32(float {{.*}}, float {{.*}}, {{.*}})
   // CHECK-FPSC-OFF: load float, ptr
   // CHECK-FPSC-OFF: [[RES:%.*]] = call float @llvm.experimental.constrained.fadd.f32(float {{.*}}, float {{.*}}, {{.*}})
diff --git a/clang/test/CodeGen/fp-floatcontrol-pragma.cpp b/clang/test/CodeGen/fp-floatcontrol-pragma.cpp
index 966eaf6053970..5861e93df5959 100644
--- a/clang/test/CodeGen/fp-floatcontrol-pragma.cpp
+++ b/clang/test/CodeGen/fp-floatcontrol-pragma.cpp
@@ -150,7 +150,7 @@ float check_precise(float x, float y) {
 }
 
 float fma_test2(float a, float b, float c) {
-// CHECK-LABEL define{{.*}} float @_Z9fma_test2fff{{.*}}
+// CHECK-LABEL: define{{.*}} float @_Z9fma_test2fff{{.*}}
 #pragma float_control(precise, off)
   float x = a * b + c;
   //CHECK: fmuladd
@@ -158,7 +158,7 @@ float fma_test2(float a, float b, float c) {
 }
 
 float fma_test1(float a, float b, float c) {
-// CHECK-LABEL define{{.*}} float @_Z9fma_test1fff{{.*}}
+// CHECK-LABEL: define{{.*}} float @_Z9fma_test1fff{{.*}}
 #pragma float_control(precise, on)
   float x = a * b + c;
   //CHECK: fmuladd
@@ -181,7 +181,7 @@ float test_OperatorCall() {
   return add(1.0f, 2.0f);
   //CHECK: llvm.experimental.constrained.fadd{{.*}}fpexcept.strict
 }
-// CHECK-LABEL define{{.*}} float  {{.*}}test_OperatorCall{{.*}}
+// CHECK-LABEL: define{{.*}} float  {{.*}}test_OperatorCall{{.*}}
 
 #if FENV_ON
 #pragma STDC FENV_ACCESS ON
diff --git a/clang/test/CodeGen/fp16-ops-strictfp.c b/clang/test/CodeGen/fp16-ops-strictfp.c
index 25753e5b98beb..6aaa41f9c2c3a 100644
--- a/clang/test/CodeGen/fp16-ops-strictfp.c
+++ b/clang/test/CodeGen/fp16-ops-strictfp.c
@@ -502,7 +502,7 @@ void foo(void) {
 
   // Check assignments (inc. compound)
   // CHECK: store {{.*}} half {{.*}}, ptr
-  // xATIVE-HALF: store {{.*}} half 0xHC000 // FIXME: We should be folding here.
+  // COM: NATIVE-HALF: store {{.*}} half 0xHC000 // FIXME: We should be folding here.
   h0 = h1;
 
   // CHECK: call half @llvm.experimental.constrained.fptrunc.f16.f32(float -2.000000e+00, metadata !"round.tonearest", metadata !"fpexcept.strict")
diff --git a/clang/test/CodeGen/paren-list-agg-init.cpp b/clang/test/CodeGen/paren-list-agg-init.cpp
index 235352382332a..b0e2057ff3e05 100644
--- a/clang/test/CodeGen/paren-list-agg-init.cpp
+++ b/clang/test/CodeGen/paren-list-agg-init.cpp
@@ -179,11 +179,11 @@ void foo4() {
 
 // CHECK: define dso_local { i64, double } @{{.*foo5.*}}
 // CHECK-NEXT: entry:
-// CHECK-NEXT [[RETVAL:%.*]] = alloca [[UNION_U]], align 8
-// CHECK-NEXT call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[U1]], i64 16, i1 false)
-// CHECK-NEXT [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[UNION_U]], ptr %retval, i32 0, i32 0
-// CHECK-NEXT [[TMP_0:%.*]] = load { i64, double }, ptr [[COERCE_DIVE]], align 8
-// CHECK-NEXT ret { i64, double } [[TMP_0]]
+// CHECK-NEXT: [[RETVAL:%.*]] = alloca [[UNION_U]], align 8
+// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[U1]], i64 16, i1 false)
+// CHECK-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[UNION_U]], ptr %retval, i32 0, i32 0
+// CHECK-NEXT: [[TMP_0:%.*]] = load { i64, double }, ptr [[COERCE_DIVE]], align 8
+// CHECK-NEXT: ret { i64, double } [[TMP_0]]
 U foo5() {
   return u1;
 }
@@ -377,7 +377,7 @@ void foo18() {
 // CHECK-NEXT: [[A:%.*a.*]] = getelementptr inbounds nuw [[STRUCT_G]], ptr [[G]], i32 0, i32 0
 // CHECK-NEXT: store i32 2, ptr [[A]], align 4
 // CHECK-NEXT: [[F:%.*]] = getelementptr inbounds i8, ptr [[G]], i64 4
-// CHECk-NEXT: call void @{{.*F.*}}(ptr noundef nonnull align 1 dereferenceable(1)) [[F]], ie32 noundef 1)
+// CHECK-NEXT: call void @_ZN1FC1Ei(ptr noundef nonnull align 1 dereferenceable(1) [[F]], i32 noundef 1)
 // CHECK: ret void
 void foo19() {
   G g(2);
diff --git a/clang/test/CodeGen/regcall.c b/clang/test/CodeGen/regcall.c
index f10da87353fa1..70b13eb53fdd9 100644
--- a/clang/test/CodeGen/regcall.c
+++ b/clang/test/CodeGen/regcall.c
@@ -60,7 +60,7 @@ void __regcall hfa3(double a, double b, double c, double d, double e, struct HFA
 // Because they are not classified as homogeneous, they don't get special
 // handling to ensure alignment.
 void __regcall hfa4(struct HFA5 a) {}
-// X32: define dso_local x86_regcallcc void @__regcall3__hfa4(ptr noundef byval(%struct.HFA5) align 4 %{{.*}})
+// X86: define dso_local x86_regcallcc void @__regcall3__hfa4(ptr noundef byval(%struct.HFA5) align 4 %{{.*}})
 // Win64: define dso_local x86_regcallcc void @__regcall3__hfa4(ptr noundef %a)
 // Lin64: define dso_local x86_regcallcc void @__regcall3__hfa4(double %a.coerce0, double %a.coerce1, double %a.coerce2, double %a.coerce3, double %a.coerce4)
 
diff --git a/clang/test/CodeGen/regcall4.c b/clang/test/CodeGen/regcall4.c
index 5fbe77fbc7d76..479f16471ccae 100644
--- a/clang/test/CodeGen/regcall4.c
+++ b/clang/test/CodeGen/regcall4.c
@@ -60,7 +60,7 @@ void __regcall hfa3(double a, double b, double c, double d, double e, struct HFA
 // Because they are not classified as homogeneous, they don't get special
 // handling to ensure alignment.
 void __regcall hfa4(struct HFA5 a) {}
-// X32: define dso_local x86_regcallcc void @__regcall4__hfa4(ptr noundef byval(%struct.HFA5) align 4 %{{.*}})
+// X86: define dso_local x86_regcallcc void @__regcall4__hfa4(ptr noundef byval(%struct.HFA5) align 4 %{{.*}})
 // Win64: define dso_local x86_regcallcc void @__regcall4__hfa4(ptr noundef %a)
 // Lin64: define dso_local x86_regcallcc void @__regcall4__hfa4(double %a.coerce0, double %a.coerce1, double %a.coerce2, double %a.coerce3, double %a.coerce4)
 
diff --git a/clang/test/CodeGen/tbaa-class.cpp b/clang/test/CodeGen/tbaa-class.cpp
index 0ac59085e634d..feb09822f133a 100644
--- a/clang/test/CodeGen/tbaa-class.cpp
+++ b/clang/test/CodeGen/tbaa-class.cpp
@@ -272,10 +272,10 @@ uint32_t g14(StructM2 *M, StructS *S) {
 // OLD-PATH: [[TYPE_D]] = !{!"_ZTS7StructD", [[TYPE_SHORT]], i64 0, [[TYPE_B]], i64 4, [[TYPE_INT]], i64 28, [[TYPE_CHAR]], i64 32}
 // OLD-PATH: [[TAG_M1_f16_2]] = !{[[TYPE_M1:!.*]], [[TYPE_SHORT]], i64 12}
 // OLD-PATH: [[TYPE_M1]] = !{!"_ZTS8StructM1", [[TYPE_S]], i64 0, [[TYPE_T:!.*]], i64 8, [[TYPE_SHORT]], i64 12}
-// OLD_PATH: [[TYPE_T]] = !{!"_ZTS7StructT", [[TYPE_INT]], i64 0}
+// OLD-PATH: [[TYPE_T]] = !{!"_ZTS7StructT", [[TYPE_INT]], i64 0}
 // OLD-PATH: [[TAG_M2_f16_2]] = !{[[TYPE_M2:!.*]], [[TYPE_SHORT]], i64 20}
 // OLD-PATH: [[TYPE_M2]] = !{!"_ZTS8StructM2", [[TYPE_DYN:!.*]], i64 0, [[TYPE_S]], i64 12, [[TYPE_SHORT]], i64 20}
-// OLD_PATH: [[TYPE_DYN]] = !{!"_ZTS9StructDyn", [[TYPE_INT]], i64 8}
+// OLD-PATH: [[TYPE_DYN]] = !{!"_ZTS9StructDyn", [[TYPE_INT]], i64 8}
 
 // NEW-PATH: [[TYPE_CHAR:!.*]] = !{!{{.*}}, i64 1, !"omnipotent char"}
 // NEW-PATH: [[TAG_i32]] = !{[[TYPE_INT:!.*]], [[TYPE_INT]], i64 0, i64 4}
@@ -300,7 +300,7 @@ uint32_t g14(StructM2 *M, StructS *S) {
 // NEW-PATH: [[TYPE_D]] = !{[[TYPE_CHAR]], i64 36, !"_ZTS7StructD", [[TYPE_SHORT]], i64 0, i64 2, [[TYPE_B]], i64 4, i64 24, [[TYPE_INT]], i64 28, i64 4, [[TYPE_CHAR]], i64 32, i64 1}
 // NEW-PATH: [[TAG_M1_f16_2]] = !{[[TYPE_M1:!.*]], [[TYPE_SHORT]], i64 12, i64 2}
 // NEW-PATH: [[TYPE_M1]] = !{[[TYPE_CHAR]], i64 16, !"_ZTS8StructM1", [[TYPE_S]], i64 0, i64 8, [[TYPE_T:!.*]], i64 8, i64 4, [[TYPE_SHORT]], i64 12, i64 2}
-// NEW_PATH: [[TYPE_T]] = !{[[TYPE_CHAR]], i64 4, !"_ZTS7StructT", [[TYPE_INT]], i64 0, i64 4}
+// NEW-PATH: [[TYPE_T]] = !{[[TYPE_CHAR]], i64 4, !"_ZTS7StructT", [[TYPE_INT]], i64 0, i64 4}
 // NEW-PATH: [[TAG_M2_f16_2]] = !{[[TYPE_M2:!.*]], [[TYPE_SHORT]], i64 20, i64 2}
 // NEW-PATH: [[TYPE_M2]] = !{[[TYPE_CHAR]], i64 24, !"_ZTS8StructM2", [[TYPE_DYN:!.*]], i64 0, i64 12, [[TYPE_S]], i64 12, i64 8, [[TYPE_SHORT]], i64 20, i64 2}
-// NEW_PATH: [[TYPE_DYN]] = !{[[TYPE_CHAR]], i64 12, !"_ZTS9StructDyn", [[TYPE_INT]], i64 8, i64 4}
+// NEW-PATH: [[TYPE_DYN]] = !{[[TYPE_CHAR]], i64 16, !"_ZTS9StructDyn", [[TYPE_INT]], i64 8, i64 4}
diff --git a/clang/test/CodeGenCUDA/bf16.cu b/clang/test/CodeGenCUDA/bf16.cu
index f794b83239f14..4a7388c3b47ee 100644
--- a/clang/test/CodeGenCUDA/bf16.cu
+++ b/clang/test/CodeGenCUDA/bf16.cu
@@ -41,7 +41,7 @@ __device__ __bf16 test_call( __bf16 in) {
 // CHECK-NEXT:   _Z13external_funcDF16b,
 // CHECK-NEXT:   (
 // CHECK-NEXT:   param0
-// CHECK-NEXT    );
+// CHECK-NEXT:   );
 // CHECK:        ld.param.b16    %[[RET:rs[0-9]+]], [retval0];
   return external_func(in);
 // CHECK:        st.param.b16    [func_retval0], %[[RET]]
diff --git a/clang/test/CodeGenCUDA/implicit-host-device-fun.cu b/clang/test/CodeGenCUDA/implicit-host-device-fun.cu
index 19c13b38b5096..980a6faa9f604 100644
--- a/clang/test/CodeGenCUDA/implicit-host-device-fun.cu
+++ b/clang/test/CodeGenCUDA/implicit-host-device-fun.cu
@@ -72,8 +72,8 @@ T template_in_middle_by_host(T x) {
 
 // Implicit host device template indirectly used by device function only.
 // Emitted on device.
-// DEVICE-LABEL: define {{.*}}@_Z34template_indirectly_used_by_deviceIiET_S0_(
-// DEVICE:  ret i32 21
+// DEV-LABEL: define {{.*}}@_Z34template_indirectly_used_by_deviceIiET_S0_(
+// DEV:  ret i32 21
 template<typename T>
 T template_indirectly_used_by_device(T x) {
   return 21;
@@ -87,8 +87,8 @@ T template_in_middle_by_device(T x) {
 
 // Implicit host device template indirectly used by host device function only.
 // Emitted on host and device.
-// COMMON-LABEL: define {{.*}}@_Z39template_indirectly_used_by_host_deviceIiET_S0_(
-// COMMON:  ret i32 31
+// COMM-LABEL: define {{.*}}@_Z39template_indirectly_used_by_host_deviceIiET_S0_(
+// COMM:  ret i32 31
 template<typename T>
 T template_indirectly_used_by_host_device(T x) {
   return 31;
diff --git a/clang/test/CodeGenCXX/attr-mustprogress.cpp b/clang/test/CodeGenCXX/attr-mustprogress.cpp
index 43a8164d93913..84c36054eeab4 100644
--- a/clang/test/CodeGenCXX/attr-mustprogress.cpp
+++ b/clang/test/CodeGenCXX/attr-mustprogress.cpp
@@ -395,8 +395,8 @@ void compound2() {
 }
 
 // CXX98-NOT:  mustprogress
-// CXX11    :  mustprogress
-// FINITE   :  mustprogress
+// CXX11:  mustprogress
+// FINITE:  mustprogress
 // CHECK-LABEL: @_Z5Falsev(
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    br label %do.body
diff --git a/clang/test/CodeGenCXX/auto-var-init-stop-after.cpp b/clang/test/CodeGenCXX/auto-var-init-stop-after.cpp
index f1dc0e3a068e7..660fc37def6ae 100644
--- a/clang/test/CodeGenCXX/auto-var-init-stop-after.cpp
+++ b/clang/test/CodeGenCXX/auto-var-init-stop-after.cpp
@@ -33,7 +33,7 @@ int foo(unsigned n) {
   // PATTERN-STOP-AFTER-2-ARRAY-NOT:          vla-init.loop:
   // PATTERN-STOP-AFTER-3-VLA:                vla-init.loop:
   // PATTERN-STOP-AFTER-3-VLA-NEXT:           %vla.cur = phi ptr [ %vla, %vla-setup.loop ], [ %vla.next, %vla-init.loop ]
-  // PATTERN-STOP-AFTER-3-VLA-NEXT-NEXT:      call void @llvm.memcpy.p0.p0.i64(ptr align 8 %vla.cur, ptr align 4 @__const._Z3fooj.vla, i64 8, i1 false)
+  // PATTERN-STOP-AFTER-3-VLA-NEXT:      call void @llvm.memcpy.p0.p0.i64(ptr align 8 %vla.cur, ptr align 4 @__const._Z3fooj.vla, i64 8, i1 false)
   // PATTERN-STOP-AFTER-3-VLA-NOT:            store ptr inttoptr (i64 -6148914691236517206 to ptr), ptr %p, align 8
   // PATTERN-STOP-AFTER-4-POINTER:            store ptr inttoptr (i64 -6148914691236517206 to ptr), ptr %p, align 8
   // PATTERN-STOP-AFTER-4-POINTER-NOT:        call void @llvm.memset.p0.i64(ptr align 16 %5, i8 -86, i64 %mul, i1 false)
diff --git a/clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp b/clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
index 9b79c3728f52a..2b54c2c32e7cb 100644
--- a/clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
+++ b/clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
@@ -236,8 +236,8 @@ void fn9() {
 void fn10(int i) {
   // CHECK-LABEL: define{{.*}} void @_Z4fn10i
   // CHECK: alloca [3 x i32]
-  // CHECK-X86: call noalias nonnull align 16 ptr @_Znw{{[jm]}}
-  // CHECK-AMDGPU: call noalias nonnull align 8 ptr @_Znw{{[jm]}}
+  // X86: call noalias nonnull align 16 ptr @_Znw{{[jm]}}
+  // AMDGCN: call noalias nonnull align 8 ptr @_Znw{{[jm]}}
   // CHECK: store i32 %
   // CHECK: store i32 2
   // CHECK: store i32 3
diff --git a/clang/test/CodeGenCXX/cxx11-initializer-aggregate.cpp b/clang/test/CodeGenCXX/cxx11-initializer-aggregate.cpp
index 905a5a42cd7fe..fa947b93e33ef 100644
--- a/clang/test/CodeGenCXX/cxx11-initializer-aggregate.cpp
+++ b/clang/test/CodeGenCXX/cxx11-initializer-aggregate.cpp
@@ -124,23 +124,23 @@ namespace ZeroInit {
     long a, b, c;
   };
   // CHECK: define {{.*}}@_ZN8ZeroInit9largeish1Ev(
-  // CHECK-NOT }
+  // CHECK-NOT: }
   // CHECK: call {{.*}}memset
   Largeish largeish1() { return {}; }
   // CHECK: define {{.*}}@_ZN8ZeroInit9largeish2Ev(
-  // CHECK-NOT }
+  // CHECK-NOT: }
   // CHECK: call {{.*}}memset
   Largeish largeish2() { return Largeish(); }
   // CHECK: define {{.*}}@_ZN8ZeroInit9largeish3Ev(
-  // CHECK-NOT }
+  // CHECK-NOT: }
   // CHECK: call {{.*}}memset
   Largeish largeish3() { return Largeish{}; }
   // CHECK: define {{.*}}@_ZN8ZeroInit9largeish4Ev(
-  // CHECK-NOT }
+  // CHECK-NOT: }
   // CHECK: call {{.*}}memset
   Largeish largeish4() { return (Largeish){}; }
   // CHECK: define {{.*}}@_ZN8ZeroInit9largeish5Ev(
-  // CHECK-NOT }
+  // CHECK-NOT: }
   // CHECK: call {{.*}}memset
   Largeish largeish5() { return {0, 0, 0}; }
 
@@ -157,7 +157,7 @@ namespace ZeroInit {
     long i;
   };
   // CHECK: define {{.*}}@_ZN8ZeroInit11conversionsEv(
-  // CHECK-NOT }
+  // CHECK-NOT: }
   // CHECK: call {{.*}}memset
   Conversions conversions() {
     return {0,
diff --git a/clang/test/CodeGenCXX/cxx20-module-decomp-1.cpp b/clang/test/CodeGenCXX/cxx20-module-decomp-1.cpp
index e14f02a9e78ff..ec391ebeccf73 100644
--- a/clang/test/CodeGenCXX/cxx20-module-decomp-1.cpp
+++ b/clang/test/CodeGenCXX/cxx20-module-decomp-1.cpp
@@ -15,6 +15,6 @@ export auto &[a, b] = ary;
 auto &[c, d] = ary;
 // FIXME: We mangle the module name here, as we give this ModuleInternalLinkage
 // That's no longer needed.
-// CHECK DAG: @_ZN1MDC1e1fEE =
+// COM: CHECK-DAG: @_ZN1MDC1e1fEE =
 static auto &__attribute__((used))[e, f] = ary;
 } // namespace N
diff --git a/clang/test/CodeGenCXX/cxx2b-deducing-this.cpp b/clang/test/CodeGenCXX/cxx2b-deducing-this.cpp
index 8a78463d3a495..fd9174c282b37 100644
--- a/clang/test/CodeGenCXX/cxx2b-deducing-this.cpp
+++ b/clang/test/CodeGenCXX/cxx2b-deducing-this.cpp
@@ -107,7 +107,7 @@ void test_temporary() {
 //CHECK-NEXT: entry:
 //CHECK:    %ref.tmp = alloca %struct.MaterializedTemporary, align 1
 //CHECK:    call void @_ZN21MaterializedTemporaryC1Ev(ptr noundef nonnull align 1 dereferenceable(1) %ref.tmp){{.*}}
-//CHECK     invoke void @_ZNH21MaterializedTemporary3fooEOS_(ptr noundef nonnull align 1 dereferenceable(1) %ref.tmp){{.*}}
+//CHECK:    invoke void @_ZNH21MaterializedTemporary3fooEOS_(ptr noundef nonnull align 1 dereferenceable(1) %ref.tmp){{.*}}
 
 namespace GH86399 {
 volatile int a = 0;
diff --git a/clang/test/CodeGenCXX/debug-info-nested-exprs.cpp b/clang/test/CodeGenCXX/debug-info-nested-exprs.cpp
index 8f07508be3465..af7e584043a97 100644
--- a/clang/test/CodeGenCXX/debug-info-nested-exprs.cpp
+++ b/clang/test/CodeGenCXX/debug-info-nested-exprs.cpp
@@ -198,5 +198,5 @@ int foo(int x, int y, int z) {
 // COLUMNS: ![[ANDRHS]] = !DILocation
 // COLUMNS: ![[AND_CREATE]] = !DILocation
 // COLUMNS: ![[AND_FUNC]] = !DILocation
-// COLUNMS: ![[RETSUB]] = !DILocation(
+// COLUMNS: ![[RETSUB]] = !DILocation(
 // COLUMNS: ![[RETMUL]] = !DILocation(
diff --git a/clang/test/CodeGenCXX/dllexport.cpp b/clang/test/CodeGenCXX/dllexport.cpp
index c8ac526f4cbe3..7523f0243b009 100644
--- a/clang/test/CodeGenCXX/dllexport.cpp
+++ b/clang/test/CodeGenCXX/dllexport.cpp
@@ -656,19 +656,19 @@ struct __declspec(dllexport) DefaultedCtorsDtors {
 // Export defaulted member function definitions declared inside class.
 struct __declspec(dllexport) ExportDefaultedInclassDefs {
   ExportDefaultedInclassDefs() = default;
-  // M32VS2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc ptr @"??0ExportDefaultedInclassDefs@@QAE@XZ"(ptr returned %this)
+  // M32MSVC2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc ptr @"??0ExportDefaultedInclassDefs@@QAE@XZ"(ptr returned %this)
   // M64VS2013-DAG: define weak_odr dso_local dllexport                ptr @"??0ExportDefaultedInclassDefs@@QEAA@XZ"(ptr returned %this)
   // M32VS2015-NOT: define weak_odr dso_local dllexport x86_thiscallcc ptr @"??0ExportDefaultedInclassDefs@@QAE@XZ"(ptr returned %this)
   // M64VS2015-NOT: define weak_odr dso_local dllexport                ptr @"??0ExportDefaultedInclassDefs@@QEAA@XZ"(ptr returned %this)
 
   ~ExportDefaultedInclassDefs() = default;
-  // M32VS2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??1ExportDefaultedInclassDefs@@QAE@XZ"(ptr %this)
+  // M32MSVC2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc void @"??1ExportDefaultedInclassDefs@@QAE@XZ"(ptr %this)
   // M64VS2013-DAG: define weak_odr dso_local dllexport                void @"??1ExportDefaultedInclassDefs@@QEAA@XZ"(ptr %this)
   // M32VS2015-NOT: define weak_odr dso_local dllexport x86_thiscallcc void @"??1ExportDefaultedInclassDefs@@QAE@XZ"(ptr %this)
   // M64VS2015-NOT: define weak_odr dso_local dllexport                void @"??1ExportDefaultedInclassDefs@@QEAA@XZ"(ptr %this)
 
   ExportDefaultedInclassDefs(const ExportDefaultedInclassDefs&) = default;
-  // M32VS2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc ptr @"??0ExportDefaultedInclassDefs@@QAE@ABU0@@Z"(ptr {{[^,]*}} returned {{[^,]*}} %this, ptr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}))
+  // M32MSVC2013-DAG: define weak_odr dso_local dllexport x86_thiscallcc ptr @"??0ExportDefaultedInclassDefs@@QAE@ABU0@@Z"(ptr {{[^,]*}} returned {{[^,]*}} %this, ptr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}))
   // M64VS2013-DAG: define weak_odr dso_local dllexport                ptr @"??0ExportDefaultedInclassDefs@@QEAA@AEBU0@@Z"(ptr {{[^,]*}} returned {{[^,]*}} %this, ptr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}))
   // M32VS2015-NOT: define weak_odr dso_local dllexport x86_thiscallcc ptr @"??0ExportDefaultedInclassDefs@@QAE@ABU0@@Z"(ptr {{[^,]*}} returned {{[^,]*}} %this, ptr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}))
   // M64VS2015-NOT: define weak_odr dso_local dllexport                ptr @"??0ExportDefaultedInclassDefs@@QEAA@AEBU0@@Z"(ptr {{[^,]*}} returned {{[^,]*}} %this, ptr nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}))
diff --git a/clang/test/CodeGenCXX/float16-declarations.cpp b/clang/test/CodeGenCXX/float16-declarations.cpp
index b395beb263e15..f4b44ec791b7b 100644
--- a/clang/test/CodeGenCXX/float16-declarations.cpp
+++ b/clang/test/CodeGenCXX/float16-declarations.cpp
@@ -130,8 +130,8 @@ int main(void) {
 
 
   long double cvtld = f2n;
-//CHECK-AARCh64-DAG: [[H2LD:%[a-z0-9]+]] = fpext half {{%[0-9]+}} to fp128
-//CHECK-AARCh64-DAG: store fp128 [[H2LD]], ptr %{{.*}}, align 16
+//CHECK-AARCH64-DAG: [[H2LD:%[a-z0-9]+]] = fpext half {{%[0-9]+}} to fp128
+//CHECK-AARCH64-DAG: store fp128 [[H2LD]], ptr %{{.*}}, align 16
 
   _Float16 f2h = 42.0f;
 //CHECK-DAG: store half 0xH5140, ptr %{{.*}}, align 2
diff --git a/clang/test/CodeGenCXX/for-cond-var.cpp b/clang/test/CodeGenCXX/for-cond-var.cpp
index 25279181903a2..f88aa4c592223 100644
--- a/clang/test/CodeGenCXX/for-cond-var.cpp
+++ b/clang/test/CodeGenCXX/for-cond-var.cpp
@@ -65,7 +65,7 @@ void PR49585() {
   // CHECK: [[cleanup_cont]]:
   // CHECK: br label %[[for_cond]]
 
-  // CHECK [[for_end]]:
+  // CHECK: [[for_end]]:
   // CHECK: ret void
 }
 
@@ -120,7 +120,7 @@ void PR49585_break() {
   // CHECK: [[cleanup_cont]]:
   // CHECK: br label %[[for_cond]]
 
-  // CHECK [[for_end]]:
+  // CHECK: [[for_end]]:
   // CHECK: ret void
 }
 
diff --git a/clang/test/CodeGenCXX/mangle-class-nttp.cpp b/clang/test/CodeGenCXX/mangle-class-nttp.cpp
index 12c81f2ba0514..5d3fbc561e29d 100644
--- a/clang/test/CodeGenCXX/mangle-class-nttp.cpp
+++ b/clang/test/CodeGenCXX/mangle-class-nttp.cpp
@@ -210,7 +210,7 @@ template void f<M128{1, 2, 3, 4}>();
 template void f<M128D{1, 2}>();
 // FIXME: We define __m128i as a vector of long long, whereas MSVC appears to
 // mangle it as if it were a vector of char.
-// MSABI-FIXME: define {{.*}} @"??$f@$2UM128I@@2T__m128i@@3D00@01@0A@@0A@@0A@@0A@@0A@@0A@@0A@@0A@@0A@@0A@@0A@@0A@@0A@@0A@@@@@@@YAXXZ"
+// COM: MSABI: define {{.*}} @"??$f@$2UM128I@@2T__m128i@@3D00@01@0A@@0A@@0A@@0A@@0A@@0A@@0A@@0A@@0A@@0A@@0A@@0A@@0A@@0A@@@@@@@YAXXZ"
 // MSABI: define {{.*}} @"??$f@$2UM128I@@2T__m128i@@3_J00@01@@@@@@YAXXZ"
 template void f<M128I{1, 2}>();
 
diff --git a/clang/test/CodeGenCXX/mangle-nttp-anon-union.cpp b/clang/test/CodeGenCXX/mangle-nttp-anon-union.cpp
index 4fd4a51bc3ee1..62beb313a6716 100644
--- a/clang/test/CodeGenCXX/mangle-nttp-anon-union.cpp
+++ b/clang/test/CodeGenCXX/mangle-nttp-anon-union.cpp
@@ -109,5 +109,5 @@ void uses() {
   // DEMANGLED: call void @void dummy<wrapper5<double>{wrapper5<double>::'unnamed'{.RightName = wrapper5<double>::'unnamed'::'unnamed'{wrapper5<double>::'unnamed'::'unnamed'::'unnamed'{0x1.ec{{.*}}p+6}, 0x1.c8{{.*}}p+8}}}>()()
   dummy<wrapper6<double>{1}>();
   // CHECK: call void @_Z5dummyITnDaXtl8wrapper6IdEtlNS1_Ut_Edi9RightNametlNS2_Ut_Edi9RightNameLd3ff0000000000000EEEEEEvv
-  // DEMANGELD: call void @void dummy<wrapper6<double>{wrapper6<double>::'unnamed'{.RightName = wrapper6<double>::'unnamed'::'unnamed'{.RightName = 0x1{{.*}}p+0}}}>()()   
+  // DEMANGLED: call void @void dummy<wrapper6<double>{wrapper6<double>::'unnamed'{.RightName = wrapper6<double>::'unnamed'::'unnamed'{.RightName = 0x1{{.*}}p+0}}}>()()   
 }
diff --git a/clang/test/CodeGenCXX/mangle-win-ccs.cpp b/clang/test/CodeGenCXX/mangle-win-ccs.cpp
index 8b3e67b918eba..3441036672d9b 100644
--- a/clang/test/CodeGenCXX/mangle-win-ccs.cpp
+++ b/clang/test/CodeGenCXX/mangle-win-ccs.cpp
@@ -31,8 +31,8 @@ int as_fastcall() { return func_as_ptr(f_fastcall); }
 // disambiguate it from the member pointer case below where it shouldn't be
 // mangled.
 //int as_thiscall() { return func_as_ptr(f_thiscall); }
-// CHECKX: define dso_local i32 @_Z11as_thiscallv()
-// CHECKX:   call i32 @_ZL11func_as_ptrIPU8thiscallFviiEEiT_(ptr @_Z10f_thiscallii)
+// COM: CHECK: define dso_local i32 @_Z11as_thiscallv()
+// COM: CHECK:   call i32 @_ZL11func_as_ptrIPU8thiscallFviiEEiT_(ptr @_Z10f_thiscallii)
 
 // CHECK: define dso_local void @_Z11funcRefTypeRU8fastcallFviiE(ptr noundef nonnull %fr)
 void funcRefType(void(__attribute__((fastcall)) & fr)(int, int)) {
diff --git a/clang/test/CodeGenCXX/microsoft-abi-explicit-object-parameters.cpp b/clang/test/CodeGenCXX/microsoft-abi-explicit-object-parameters.cpp
index 8abd7e04b597a..c5611fb528ca1 100644
--- a/clang/test/CodeGenCXX/microsoft-abi-explicit-object-parameters.cpp
+++ b/clang/test/CodeGenCXX/microsoft-abi-explicit-object-parameters.cpp
@@ -65,6 +65,6 @@ void chain_test() {
 // CHECK: {{.*}} = alloca %struct.S2, align 4
 // CHECK: %call = call i32 @"?bar@T@@SA?AUS2@@_VAEBU1@H@Z"{{.*}}
 // CHECK: %coerce.dive = getelementptr inbounds nuw %struct.S2, {{.*}} %{{.*}}, i32 0, i32 0
-// CHECK  store i32 %call, ptr %coerce.dive, align 4
+// CHECK: store i32 %call, ptr %coerce.dive, align 4
 // CHECK: call void @"?foo@S2@@SAX_VAEBU1@H@Z"
 // CHECK: ret void
diff --git a/clang/test/CodeGenCXX/microsoft-abi-throw.cpp b/clang/test/CodeGenCXX/microsoft-abi-throw.cpp
index 10a58b21fc101..b861127430ae5 100644
--- a/clang/test/CodeGenCXX/microsoft-abi-throw.cpp
+++ b/clang/test/CodeGenCXX/microsoft-abi-throw.cpp
@@ -14,7 +14,7 @@
 // CHECK-DAG: @"_TI5?AUY@@" = linkonce_odr unnamed_addr constant %eh.ThrowInfo { i32 0, ptr @"??_DY@@QAEXXZ", ptr null, ptr @"_CTA5?AUY@@" }, section ".xdata", comdat
 // CHECK-DAG: @"_CT??_R0?AUDefault@@@8??_ODefault@@QAEXAAU0@@Z1" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUDefault@@@8", i32 0, i32 -1, i32 0, i32 1, ptr @"??_ODefault@@QAEXAAU0@@Z" }, section ".xdata", comdat
 // CHECK-DAG: @"_CT??_R0?AUDeletedCopy@@@81" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUDeletedCopy@@@8", i32 0, i32 -1, i32 0, i32 1, ptr null }, section ".xdata", comdat
-// CHECk-DAG: @"_CT??_R0?AUMoveOnly@@@84" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUMoveOnly@@@8", i32 0, i321-1, i32 0, i32 4, ptr null }, section ".xdata", comda
+// CHECK-DAG: @"_CT??_R0?AUMoveOnly@@@84" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUMoveOnly@@@8", i32 0, i321-1, i32 0, i32 4, ptr null }, section ".xdata", comdat
 // CHECK-DAG: @"_CT??_R0?AUVariadic@@@8??_OVariadic@@QAEXAAU0@@Z1" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUVariadic@@@8", i32 0, i32 -1, i32 0, i32 1, ptr @"??_OVariadic@@QAEXAAU0@@Z" }, section ".xdata", comdat
 // CHECK-DAG: @"_CT??_R0?AUTemplateWithDefault@@@8??$?_OH@TemplateWithDefault@@QAEXAAU0@@Z1" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUTemplateWithDefault@@@8", i32 0, i32 -1, i32 0, i32 1, ptr @"??$?_OH@TemplateWithDefault@@QAEXAAU0@@Z" }, section ".xdata", comdat
 // CHECK-DAG: @"_CTA2$$T" = linkonce_odr unnamed_addr constant %eh.CatchableTypeArray.2 { i32 2, [2 x ptr] [ptr @"_CT??_R0$$T@84", ptr @"_CT??_R0PAX@84"] }, section ".xdata", comdat
diff --git a/clang/test/CodeGenCXX/ms-local-vft-alias-comdat.cpp b/clang/test/CodeGenCXX/ms-local-vft-alias-comdat.cpp
index 7eaa05c02c102..6e621d2bed015 100644
--- a/clang/test/CodeGenCXX/ms-local-vft-alias-comdat.cpp
+++ b/clang/test/CodeGenCXX/ms-local-vft-alias-comdat.cpp
@@ -27,4 +27,4 @@ struct ah {
 
 //CHECK: @0 = private unnamed_addr constant { [2 x ptr] } { [2 x ptr] [ptr @"??_R4?$T@V<lambda_0>@@@@6B@", ptr @"?c@?$T@V<lambda_0>@@@@UEAAXXZ"] }
 //CHECK: @"??_7?$T@V<lambda_0>@@@@6B@" = internal unnamed_addr alias ptr, getelementptr inbounds ({ [2 x ptr] }, ptr @0, i32 0, i32 0, i32 1)
-//CHECK-NOT : "??_7?$e@V<lambda_0>@@@@6B@" = comdat any
+//CHECK-NOT: "??_7?$e@V<lambda_0>@@@@6B@" = comdat any
diff --git a/clang/test/CodeGenCXX/runtime-dllstorage.cpp b/clang/test/CodeGenCXX/runtime-dllstorage.cpp
index aa0e8172ca0f3..2b9cd2ae8f0c5 100644
--- a/clang/test/CodeGenCXX/runtime-dllstorage.cpp
+++ b/clang/test/CodeGenCXX/runtime-dllstorage.cpp
@@ -134,7 +134,7 @@ void l() {
 // CHECK-DYNAMIC-NODECL-IA-DAG: declare dllimport void @__cxa_guard_release(ptr)
 // CHECK-DYNAMIC-IMPORT-IA-DAG: declare dllimport void @__cxa_guard_release(ptr)
 // CHECK-DYNAMIC-EXPORT-IA-DAG: declare dllimport void @__cxa_guard_release(ptr)
-// CHECK-DYANMIC-IA-DAG: declare dllimport void @_ZSt9terminatev()
+// CHECK-DYNAMIC-IA-DAG: declare dllimport void @_ZSt9terminatev()
 // CHECK-DYNAMIC-NODECL-IA-DAG: declare dso_local void @_ZSt9terminatev()
 // CHECK-DYNAMIC-IMPORT-IA-DAG: declare dllimport void @_ZSt9terminatev()
 // CHECK-DYNAMIC-EXPORT-IA-DAG: declare dso_local dllexport void @_ZSt9terminatev()
diff --git a/clang/test/CodeGenCXX/static-member-variable-explicit-specialization.cpp b/clang/test/CodeGenCXX/static-member-variable-explicit-specialization.cpp
index 46c4c4d391769..cf55c567c0a3d 100644
--- a/clang/test/CodeGenCXX/static-member-variable-explicit-specialization.cpp
+++ b/clang/test/CodeGenCXX/static-member-variable-explicit-specialization.cpp
@@ -23,7 +23,7 @@ extern "C" int foo();
 template<typename T> struct A { static int a; };
 template<typename T> int A<T>::a = foo();
 
-// ALLK-NOT: @_ZN1AIcE1aE
+// ALL-NOT: @_ZN1AIcE1aE
 template<> int A<char>::a;
 
 // ALL: @_ZN1AIbE1aE ={{.*}} global i32 10
diff --git a/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp b/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
index e8d3a8407cda7..d27c56d449a58 100644
--- a/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
+++ b/clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
@@ -112,7 +112,7 @@ void g(B *a) { a->foo(); }
 // CHECK3: call{{.*}} void @_ZN5test31CC1Ev(ptr
 // CHECK3: %[[CMP:.*]] = icmp eq ptr addrspace(1) %{{.*}}, getelementptr inbounds inrange(-24, 8) ({ [4 x ptr addrspace(1)] }, ptr addrspace(1) @_ZTVN5test31CE, i32 0, i32 0, i32 3)
 // CHECK3: call{{.*}} void @llvm.assume(i1 %[[CMP]])
-// CHECK3-LABLEL: }
+// CHECK3-LABEL: }
 void test() {
   C c;
   g(&c);
diff --git a/clang/test/CodeGenCXX/vtable-assume-load.cpp b/clang/test/CodeGenCXX/vtable-assume-load.cpp
index 6ce07d0db1b15..21ed9233a74fa 100644
--- a/clang/test/CodeGenCXX/vtable-assume-load.cpp
+++ b/clang/test/CodeGenCXX/vtable-assume-load.cpp
@@ -111,7 +111,7 @@ void g(B *a) { a->foo(); }
 // CHECK3: call void @_ZN5test31CC1Ev(ptr
 // CHECK3: %[[CMP:.*]] = icmp eq ptr %{{.*}}, getelementptr inbounds inrange(-24, 8) ({ [4 x ptr] }, ptr @_ZTVN5test31CE, i32 0, i32 0, i32 3)
 // CHECK3: call void @llvm.assume(i1 %[[CMP]])
-// CHECK3-LABLEL: }
+// CHECK3-LABEL: }
 void test() {
   C c;
   g(&c);
diff --git a/clang/test/CodeGenObjC/arc.m b/clang/test/CodeGenObjC/arc.m
index 8eaca8ea1c68c..c2b34ce542ee6 100644
--- a/clang/test/CodeGenObjC/arc.m
+++ b/clang/test/CodeGenObjC/arc.m
@@ -740,9 +740,9 @@ - (id) init {
 // CHECK-NEXT: [[T1:%.*]] = load ptr, ptr [[SELF]]
 // CHECK-NEXT: [[IVAR:%.*]] = load i64, ptr @"OBJC_IVAR_$_Test30.helper"
 // CHECK-NEXT: [[T3:%.*]] = getelementptr inbounds i8, ptr [[T1]], i64 [[IVAR]]
-// CHECK-NEXT#: [[T5:%.*]] = load ptr, ptr [[T3]]
-// CHECK-NEXT#: [[T6:%.*]] = call ptr @llvm.objc.retain(ptr [[CALL]])
-// CHECK-NEXT#: call void @llvm.objc.release(ptr [[T5]])
+// CHECK-NEXT: [[T5:%.*]] = load ptr, ptr [[T3]]
+// CHECK-NEXT: [[T6:%.*]] = call ptr @llvm.objc.retain(ptr [[CALL]])
+// CHECK-NEXT: call void @llvm.objc.release(ptr [[T5]])
 // CHECK-NEXT: store ptr [[CALL]], ptr [[T3]]
 
 // Return.
diff --git a/clang/test/CodeGenObjC/constant-strings.m b/clang/test/CodeGenObjC/constant-strings.m
index fb5865ea754f6..571dd908ce9aa 100644
--- a/clang/test/CodeGenObjC/constant-strings.m
+++ b/clang/test/CodeGenObjC/constant-strings.m
@@ -24,7 +24,7 @@
 // CHECK-GNUSTEP2: @b ={{.*}} global ptr inttoptr (i64 -3340545023602065388 to ptr), align 8
 // CHECK-GNUSTEP2: @.objc_str_Hello_World = linkonce_odr hidden global { ptr, i32, i32, i32, i32, ptr } { ptr @._OBJC_CLASS_NSConstantString, i32 0, i32 11, i32 11, i32 0, ptr @1 }, section "__objc_constant_string", comdat, align 8
 // CHECK-GNUSTEP2: @c =
-// CHECK-SAME-GNUSTEP2: @.objc_str_Hello_World
+// CHECK-GNUSTEP2-SAME: @.objc_str_Hello_World
 //
 id a = @"Hello World!";
 id b = @"hi";
diff --git a/clang/test/CodeGenObjC/metadata-symbols-32.m b/clang/test/CodeGenObjC/metadata-symbols-32.m
index 716b26790bd33..971b1b5d512c3 100644
--- a/clang/test/CodeGenObjC/metadata-symbols-32.m
+++ b/clang/test/CodeGenObjC/metadata-symbols-32.m
@@ -27,7 +27,7 @@
 // CHECK: @OBJC_MODULES = private global {{.*}}section "__OBJC,__module_info,regular,no_dead_strip", align 4
 
 // Clang's Obj-C 32-bit doesn't emit ivars for the root class.
-// CHECKX: @"\01L_OBJC_CLASS_VARIABLES_A" = private global {{.*}}section "__OBJC,__class_vars,regular,no_dead_strip", align 4
+// COM: CHECK: @"\01L_OBJC_CLASS_VARIABLES_A" = private global {{.*}}section "__OBJC,__class_vars,regular,no_dead_strip", align 4
 
 
 /*
diff --git a/clang/test/CodeGenObjCXX/arc-blocks.mm b/clang/test/CodeGenObjCXX/arc-blocks.mm
index 90e832c6df004..3c06dfa8111d2 100644
--- a/clang/test/CodeGenObjCXX/arc-blocks.mm
+++ b/clang/test/CodeGenObjCXX/arc-blocks.mm
@@ -51,8 +51,8 @@ void foo() {
 
 // CHECK-LABEL: define linkonce_odr hidden void @__copy_helper_block_
 // CHECK-LABEL: define linkonce_odr hidden void @__destroy_helper_block_
-// CHECK-LABEL-O1: define linkonce_odr hidden void @__copy_helper_block_
-// CHECK-LABEL-O1: define linkonce_odr hidden void @__destroy_helper_block_
+// CHECK-O1-LABEL: define linkonce_odr hidden void @__copy_helper_block_
+// CHECK-O1-LABEL: define linkonce_odr hidden void @__destroy_helper_block_
 
 namespace test1 {
 
diff --git a/clang/test/CodeGenOpenCL/builtins-amdgcn.cl b/clang/test/CodeGenOpenCL/builtins-amdgcn.cl
index ded5f6b5ac4fd..6cfbf0d9a7803 100644
--- a/clang/test/CodeGenOpenCL/builtins-amdgcn.cl
+++ b/clang/test/CodeGenOpenCL/builtins-amdgcn.cl
@@ -835,7 +835,7 @@ kernel void test_s_setreg(uint val) {
   __builtin_amdgcn_s_setreg(8193, val);
 }
 
-// CHECK-LABEL test_atomic_inc_dec(
+// CHECK-LABEL: test_atomic_inc_dec(
 #if !defined(__SPIRV__)
 void test_atomic_inc_dec(local uint *lptr, global uint *gptr, uint val) {
 #else
@@ -863,7 +863,7 @@ void test_atomic_inc_dec(__attribute__((address_space(3))) uint *lptr, __attribu
   #endif
 }
 
-// CHECK-LABEL test_wavefrontsize(
+// CHECK-LABEL: test_wavefrontsize(
 unsigned test_wavefrontsize() {
 
   // CHECK-AMDGCN: ret i32 {{[0-9]+}}
@@ -871,7 +871,7 @@ unsigned test_wavefrontsize() {
   return __builtin_amdgcn_wavefrontsize();
 }
 
-// CHECK-LABEL test_flt_rounds(
+// CHECK-LABEL: test_flt_rounds(
 unsigned test_flt_rounds() {
 
   // CHECK: {{.*}}call{{.*}} i32 @llvm.get.rounding()
@@ -885,13 +885,13 @@ unsigned test_flt_rounds() {
   return mode;
 }
 
-// CHECK-LABEL test_get_fpenv(
+// CHECK-LABEL: test_get_fpenv(
 unsigned long test_get_fpenv() {
   // CHECK: {{.*}}call{{.*}} i64 @llvm.get.fpenv.i64()
   return __builtin_amdgcn_get_fpenv();
 }
 
-// CHECK-LABEL test_set_fpenv(
+// CHECK-LABEL: test_set_fpenv(
 void test_set_fpenv(unsigned long env) {
   // CHECK: {{.*}}call{{.*}} void @llvm.set.fpenv.i64(i64 %[[ENV:.+]])
   __builtin_amdgcn_set_fpenv(env);
diff --git a/clang/test/CodeGenOpenCL/builtins-r600.cl b/clang/test/CodeGenOpenCL/builtins-r600.cl
index a82c4fb90ec50..66de7dde3646e 100644
--- a/clang/test/CodeGenOpenCL/builtins-r600.cl
+++ b/clang/test/CodeGenOpenCL/builtins-r600.cl
@@ -9,8 +9,8 @@ void test_recipsqrt_ieee_f32(global float* out, float a)
 }
 
 #if cl_khr_fp64
-// XCHECK-LABEL: @test_recipsqrt_ieee_f64
-// XCHECK: call double @llvm.r600.recipsqrt.ieee.f64
+// CHECK-LABEL: @test_recipsqrt_ieee_f64
+// CHECK: call double @llvm.r600.recipsqrt.ieee.f64
 void test_recipsqrt_ieee_f64(global double* out, double a)
 {
   *out = __builtin_r600_recipsqrt_ieee(a);
diff --git a/clang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl b/clang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl
index a1408d38a44c9..f3184d6aac4f3 100644
--- a/clang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl
+++ b/clang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl
@@ -364,7 +364,7 @@ kernel void device_side_enqueue(global int *a, global int *b, int i) {
   bl_t b2 = b1;
   // COMMON: call {{(spir_func )?}}void @block_G_block_invoke(ptr addrspace(4) addrspacecast (ptr addrspace(1)
   // COMMON-SAME: [[BL_GLOBAL]]
-  // COOMON-SAME: to ptr addrspace(4)), ptr addrspace(3) null)
+  // COMMON-SAME: to ptr addrspace(4)), ptr addrspace(3) null)
   b2(0);
   // Uses global block literal [[BL_GLOBAL]] and block kernel [[INV_G_K]]. [[INV_G_K]] calls [[INV_G]].
   // COMMON: call {{(spir_func )?}}i32 @__get_kernel_preferred_work_group_size_multiple_impl(
diff --git a/clang/test/CodeGenSYCL/debug-info-kernel-variables.cpp b/clang/test/CodeGenSYCL/debug-info-kernel-variables.cpp
index 96c0dcfdb75b6..7c634f88a5134 100644
--- a/clang/test/CodeGenSYCL/debug-info-kernel-variables.cpp
+++ b/clang/test/CodeGenSYCL/debug-info-kernel-variables.cpp
@@ -29,7 +29,7 @@ int my_host() {
 }
 
 // CHECK:      define {{.*}}spir_func void @_Z9my_kerneli(
-// CHECK-SAME    i32 %my_param
+// CHECK-SAME:   i32 %my_param
 // CHECK-SAME:   !dbg [[MY_KERNEL:![0-9]+]]
 // CHECK-SAME: {
 // CHECK:        %my_param.addr = alloca i32, align 4
diff --git a/clang/test/Driver/avr-ld.c b/clang/test/Driver/avr-ld.c
index 3e4114485332f..93ab2ce83c027 100644
--- a/clang/test/Driver/avr-ld.c
+++ b/clang/test/Driver/avr-ld.c
@@ -6,7 +6,7 @@
 
 // RUN: %clang -### --target=avr -mmcu=attiny13 --rtlib=libgcc --sysroot %S/Inputs/basic_avr_tree %s -mno-relax 2>&1 | FileCheck -check-prefix LINKC %s
 // LINKC: {{".*ld.*"}} {{.*}} {{"-L.*avr25/tiny-stack"}} {{.*}} "--defsym=__DATA_REGION_ORIGIN__=0x800060" "--start-group" {{.*}} "-lattiny13" {{.*}} "--end-group" "-mavr25"
-// LINLC-NOT: "--relax"
+// LINKC-NOT: "--relax"
 
 // RUN: %clang -### --target=avr -mmcu=attiny44 --rtlib=libgcc --sysroot %S/Inputs/basic_avr_tree %s 2>&1 | FileCheck -check-prefix LINKD %s
 // LINKD: {{".*ld.*"}} {{.*}} {{"-L.*avr25"}} {{.*}} "--defsym=__DATA_REGION_ORIGIN__=0x800060" "--start-group" {{.*}} "-lattiny44" {{.*}} "--end-group" "--relax" "-mavr25"
diff --git a/clang/test/Driver/baremetal-sysroot.cpp b/clang/test/Driver/baremetal-sysroot.cpp
index 5cbb7ac69a7ac..5d5b336a01b0b 100644
--- a/clang/test/Driver/baremetal-sysroot.cpp
+++ b/clang/test/Driver/baremetal-sysroot.cpp
@@ -14,7 +14,7 @@
 // RUN:   | FileCheck --check-prefix=CHECK-V6M-C %s
 // CHECK-V6M-C: "{{.*}}clang{{.*}}" "-cc1" "-triple" "thumbv6m-unknown-none-eabi"
 // CHECK-V6M-C-SAME: "-internal-isystem" "{{.*}}/baremetal_default_sysroot{{[/\\]+}}bin{{[/\\]+}}..{{[/\\]+}}lib{{[/\\]+}}clang-runtimes{{[/\\]+}}armv6m-none-eabi{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
-// CHECk-V6M-C-SAME: "-internal-isystem" "{{.*}}/baremetal_default_sysroot{{[/\\]+}}bin{{[/\\]+}}..{{[/\\]+}}lib{{[/\\]+}}clang-runtimes{{[/\\]+}}armv6m-none-eabi{{[/\\]+}}include"
+// CHECK-V6M-C-SAME: "-internal-isystem" "{{.*}}/baremetal_default_sysroot{{[/\\]+}}bin{{[/\\]+}}..{{[/\\]+}}lib{{[/\\]+}}clang-runtimes{{[/\\]+}}armv6m-none-eabi{{[/\\]+}}include"
 // CHECK-V6M-C-SAME: "-x" "c++" "{{.*}}baremetal-sysroot.cpp"
 // CHECK-V6M-C-NEXT: "{{[^"]*}}ld{{(\.(lld|bfd|gold))?}}{{(\.exe)?}}" "{{.*}}.o" "-Bstatic"
 // CHECK-V6M-C-SAME: "-L{{.*}}/baremetal_default_sysroot{{[/\\]+}}bin{{[/\\]+}}..{{[/\\]+}}lib{{[/\\]+}}clang-runtimes{{[/\\]+}}armv6m-none-eabi{{[/\\]+}}lib"
diff --git a/clang/test/Driver/baremetal.cpp b/clang/test/Driver/baremetal.cpp
index 6d6255ef5970f..a80aa9b437117 100644
--- a/clang/test/Driver/baremetal.cpp
+++ b/clang/test/Driver/baremetal.cpp
@@ -203,7 +203,7 @@
 // CHECK-RV64-SAME: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
 // CHECK-RV64-SAME: "-isysroot" "[[SYSROOT:[^"]*]]"
 // CHECK-RV64-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
-// CHECk-RV64-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include"
+// CHECK-RV64-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include"
 // CHECK-RV64-SAME: "-x" "c++" "{{.*}}baremetal.cpp"
 // CHECK-RV64-NEXT: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
 // CHECK-RV64-SAME: "-Lsome{{[/\\]+}}directory{{[/\\]+}}user{{[/\\]+}}asked{{[/\\]+}}for"
@@ -337,7 +337,7 @@
 // CHECK-RV64FD-SAME: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
 // CHECK-RV64FD-SAME: "-isysroot" "[[SYSROOT:[^"]*]]"
 // CHECK-RV64FD-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}rv64imafdc{{[/\\]+}}lp64d{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
-// CHECk-RV64FD-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}rv64imafdc{{[/\\]+}}lp64d{{[/\\]+}}include"
+// CHECK-RV64FD-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}rv64imafdc{{[/\\]+}}lp64d{{[/\\]+}}include"
 // CHECK-RV64FD-SAME: "-x" "c++" "{{.*}}baremetal.cpp"
 // CHECK-RV64FD-NEXT: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
 // CHECK-RV64FD-SAME: "-L[[SYSROOT:[^"]+]]{{[/\\]+}}rv64imafdc{{[/\\]+}}lp64d{{[/\\]+}}lib"
diff --git a/clang/test/Driver/cl-zc.cpp b/clang/test/Driver/cl-zc.cpp
index 5f0cd5e00819d..e7a66df7e6467 100644
--- a/clang/test/Driver/cl-zc.cpp
+++ b/clang/test/Driver/cl-zc.cpp
@@ -61,7 +61,7 @@
 
 // RUN: %clang_cl /c -### /Zc:foobar -- %s 2>&1 | FileCheck -check-prefix=FOOBAR-ON %s
 // FOOBAR-ON: argument unused during compilation
-// RUN: %clang_cl /c -### /Zc:foobar- -- %s 2>&1 | FileCheck -check-prefix=FOOBAR-ON %s
+// RUN: %clang_cl /c -### /Zc:foobar- -- %s 2>&1 | FileCheck -check-prefix=FOOBAR-OFF %s
 // FOOBAR-OFF: argument unused during compilation
 
 // These are ignored if enabled, and warn if disabled.
diff --git a/clang/test/Driver/fsanitize-coverage.c b/clang/test/Driver/fsanitize-coverage.c
index c2de897f80eeb..6c8b0583e4cb0 100644
--- a/clang/test/Driver/fsanitize-coverage.c
+++ b/clang/test/Driver/fsanitize-coverage.c
@@ -147,7 +147,7 @@
 // CHECK-VS-SHADOWCALLSTACK: -fsanitize-coverage-trace-pc-guard
 // CHECK-VS-SHADOWCALLSTACK: -fsanitize=shadow-call-stack
 
-// RUN: %clang --target=x86_64-linux-gnu -fsanitize=shadow-call-stack -fsanitize-coverage=trace-pc-guard -fno-sanitize=shadow-call-stack %s -### 2>&1 | FileCheck %s --check-prefix=CHECK-NO-SAFESTACK
+// RUN: %clang --target=x86_64-linux-gnu -fsanitize=shadow-call-stack -fsanitize-coverage=trace-pc-guard -fno-sanitize=shadow-call-stack %s -### 2>&1 | FileCheck %s --check-prefix=CHECK-NO-SHADOWCALLSTACK
 // CHECK-NO-SHADOWCALLSTACK-NOT: error:
 // CHECK-NO-SHADOWCALLSTACK-NOT: warning:
 // CHECK-NO-SHADOWCALLSTACK-NOT: argument unused
diff --git a/clang/test/Driver/fsanitize-ignorelist.c b/clang/test/Driver/fsanitize-ignorelist.c
index 7dd666a453198..f405e190f1b2e 100644
--- a/clang/test/Driver/fsanitize-ignorelist.c
+++ b/clang/test/Driver/fsanitize-ignorelist.c
@@ -54,9 +54,9 @@
 
 // -fno-sanitize-ignorelist disables all ignorelists specified earlier.
 // RUN: %clang --target=x86_64-linux-gnu -fsanitize=address -fsanitize-ignorelist=%t.good -fno-sanitize-ignorelist -fsanitize-ignorelist=%t.second %s -### 2>&1 | FileCheck %s --check-prefix=CHECK-ONLY-FIRST-DISABLED --implicit-check-not=-fsanitize-ignorelist=
-// CHECK-ONLY_FIRST-DISABLED-NOT: good
+// CHECK-ONLY-FIRST-DISABLED-NOT: good
 // CHECK-ONLY-FIRST-DISABLED: -fsanitize-ignorelist={{.*}}.second
-// CHECK-ONLY_FIRST-DISABLED-NOT: good
+// CHECK-ONLY-FIRST-DISABLED-NOT: good
 
 // -fno-sanitize-ignorelist disables the system ignorelists.
 // RUN: %clang --target=x86_64-linux-gnu -fsanitize=address -fno-sanitize-ignorelist %s -### 2>&1 | FileCheck %s --check-prefix=CHECK-DISABLED-SYSTEM --check-prefix=DELIMITERS
diff --git a/clang/test/Driver/fuchsia.c b/clang/test/Driver/fuchsia.c
index cf92f85040901..bf1bcb12ef070 100644
--- a/clang/test/Driver/fuchsia.c
+++ b/clang/test/Driver/fuchsia.c
@@ -90,7 +90,7 @@
 // RUN:     | FileCheck %s -check-prefix=CHECK-RELOCATABLE
 // CHECK-RELOCATABLE-NOT: "-pie"
 // CHECK-RELOCATABLE-NOT: "--build-id"
-// CHECK-RELOCATABLE-NOT "-dynamic-linker"
+// CHECK-RELOCATABLE-NOT: "-dynamic-linker"
 // CHECK-RELOCATABLE: "-r"
 // CHECK-RELOCATABLE-NOT: "-l
 // CHECK-RELOCATABLE-NOT: crt{{[^./\\]+}}.o
diff --git a/clang/test/Driver/hip-toolchain-features.hip b/clang/test/Driver/hip-toolchain-features.hip
index dbc007ac1335b..4ef4e9f022ecb 100644
--- a/clang/test/Driver/hip-toolchain-features.hip
+++ b/clang/test/Driver/hip-toolchain-features.hip
@@ -20,7 +20,7 @@
 // SRAM: {{.*}}clang{{.*}}"-target-feature" "+sramecc"
 // NOSRAM: {{.*}}clang{{.*}}"-target-feature" "-sramecc"
 // SRAM: {{.*}}lld{{.*}} "-plugin-opt=-mattr=+sramecc"
-// NOTSRAM: {{.*}}lld{{.*}} "-plugin-opt=-mattr=-sramecc"
+// NOSRAM: {{.*}}lld{{.*}} "-plugin-opt=-mattr=-sramecc"
 
 // RUN: %clang -### --target=x86_64-linux-gnu -fgpu-rdc -nogpulib \
 // RUN:   -nogpuinc --offload-arch=gfx1010 --no-offload-new-driver %s \
diff --git a/clang/test/Driver/hip-toolchain-rdc-separate.hip b/clang/test/Driver/hip-toolchain-rdc-separate.hip
index 80f325c5d7373..37f329547ec4c 100644
--- a/clang/test/Driver/hip-toolchain-rdc-separate.hip
+++ b/clang/test/Driver/hip-toolchain-rdc-separate.hip
@@ -126,7 +126,7 @@
 // LINK-SAME: "--whole-archive"
 // LLD-TMP-SAME: "-o" "[[IMG_DEV1:.*.out]]"
 // LLD-FIN-SAME: "-o" "[[IMG_DEV1:a.out-.*gfx803]]"
-// LINK-SAME "[[A_BC1]]" "[[B_BC1]]"
+// LINK-SAME: "[[A_BC1]]" "[[B_BC1]]"
 // LINK-SAME: "--no-whole-archive"
 
 // LINK-NOT: "*.llvm-link"
@@ -137,7 +137,7 @@
 // LINK-SAME: "--whole-archive"
 // LLD-TMP-SAME: "-o" "[[IMG_DEV2:.*.out]]"
 // LLD-FIN-SAME: "-o" "[[IMG_DEV1:a.out-.*gfx900]]"
-// LINK-SAME "[[A_BC2]]" "[[B_BC2]]"
+// LINK-SAME: "[[A_BC2]]" "[[B_BC2]]"
 // LINK-SAME: "--no-whole-archive"
 
 // LINK-BUNDLE: [[BUNDLER:".*clang-offload-bundler"]] "-type=o"
diff --git a/clang/test/Driver/msp430-toolchain.c b/clang/test/Driver/msp430-toolchain.c
index 3c3042b482ef2..b56250cc282b4 100644
--- a/clang/test/Driver/msp430-toolchain.c
+++ b/clang/test/Driver/msp430-toolchain.c
@@ -215,9 +215,9 @@
 // RUN:   -T custom_script.ld 2>&1 \
 // RUN:   | FileCheck -check-prefix=CUSTOM-LD-SCRIPT %s
 // CUSTOM-LD-SCRIPT: "{{.*}}/Inputs/basic_msp430_tree/lib/gcc/msp430-elf/8.3.1/../../..{{/|\\\\}}..{{/|\\\\}}bin{{/|\\\\}}msp430-elf-ld"
-// CUSTOM-LD_SCRIPT-NOT: "-Tmsp430g2553.ld"
+// CUSTOM-LD-SCRIPT-NOT: "-Tmsp430g2553.ld"
 // CUSTOM-LD-SCRIPT: "-T" "custom_script.ld"
-// CUSTOM-LD_SCRIPT-NOT: "-Tmsp430g2553.ld"
+// CUSTOM-LD-SCRIPT-NOT: "-Tmsp430g2553.ld"
 
 // Test for compiling for simulator
 
diff --git a/clang/test/Driver/nacl-direct.c b/clang/test/Driver/nacl-direct.c
index b1a80b3e9f837..ce449617d0c7a 100644
--- a/clang/test/Driver/nacl-direct.c
+++ b/clang/test/Driver/nacl-direct.c
@@ -39,7 +39,7 @@
 // CHECK-x86_64: "-L{{.*}}{{/|\\\\}}..{{/|\\\\}}x86_64-nacl{{/|\\\\}}lib"
 // CHECK-x86_64: "-L{{.*}}{{/|\\\\}}..{{/|\\\\}}x86_64-nacl{{/|\\\\}}usr{{/|\\\\}}lib"
 // CHECK-x86_64: "-Lfoo{{/|\\\\}}lib{{/|\\\\}}x86_64-nacl"
-// CHECK-X86_64-NOT: -lpthread
+// CHECK-x86_64-NOT: -lpthread
 //
 // RUN: %clang -### %s \
 // RUN:     --target=armv7a-unknown-nacl-gnueabihf -resource-dir foo 2>&1 \
diff --git a/clang/test/Driver/riscv-arch.c b/clang/test/Driver/riscv-arch.c
index 018fa25218ea6..0d6c43c333497 100644
--- a/clang/test/Driver/riscv-arch.c
+++ b/clang/test/Driver/riscv-arch.c
@@ -539,4 +539,4 @@
 // RUN: not %clang --target=riscv32-unknown-elf -march=rv32idzdinx -### %s \
 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-D-ZDINX-ER %s
 // RV32-D-ZDINX-ER: error: invalid arch name 'rv32idzdinx',
-// RV32-D-ZFINX-ER: 'f' and 'zfinx' extensions are incompatible
+// RV32-D-ZDINX-ER: 'f' and 'zfinx' extensions are incompatible
diff --git a/clang/test/Driver/riscv-toolchain-gcc-multilib-reuse.c b/clang/test/Driver/riscv-toolchain-gcc-multilib-reuse.c
index ac70fb2631a59..f54415954e0b8 100644
--- a/clang/test/Driver/riscv-toolchain-gcc-multilib-reuse.c
+++ b/clang/test/Driver/riscv-toolchain-gcc-multilib-reuse.c
@@ -15,7 +15,7 @@
 // RUN:   -march=rv32imac -mabi=ilp32 \
 // RUN:   | FileCheck -check-prefix=GCC-MULTI-LIB-REUSE-RV32IMAC-ILP32 %s
 // GCC-MULTI-LIB-REUSE-RV32IMAC-ILP32: rv32imac/ilp32
-// GCC-MULTI-LIB-REUSE-RV32IMAC-ILP32--NOT: {{^.+$}}
+// GCC-MULTI-LIB-REUSE-RV32IMAC-ILP32-NOT: {{^.+$}}
 
 // RUN: %clang %s \
 // RUN:   -target riscv64-unknown-elf \
diff --git a/clang/test/Driver/sanitizer-ld.c b/clang/test/Driver/sanitizer-ld.c
index 71078342b3617..1c1e7e8364c69 100644
--- a/clang/test/Driver/sanitizer-ld.c
+++ b/clang/test/Driver/sanitizer-ld.c
@@ -671,7 +671,7 @@
 // CHECK-LSAN-COV-LINUX: "{{(.*[^-.0-9A-Z_a-z])?}}ld{{(.exe)?}}"
 // CHECK-LSAN-COV-LINUX-NOT: "-lc"
 // CHECK-LSAN-COV-LINUX: libclang_rt.lsan.a
-// CHECK-LSAV-COV-LINUX: libclang_rt.lsan-x86_64.a"
+// CHECK-LSAN-COV-LINUX: libclang_rt.lsan-x86_64.a"
 // CHECK-LSAN-COV-LINUX: "-lpthread"
 // CHECK-LSAN-COV-LINUX: "-ldl"
 // CHECK-LSAN-COV-LINUX: "-lresolv"
diff --git a/clang/test/Driver/save-stats.c b/clang/test/Driver/save-stats.c
index ad7867a991686..ee49668da01d9 100644
--- a/clang/test/Driver/save-stats.c
+++ b/clang/test/Driver/save-stats.c
@@ -4,9 +4,9 @@
 // CHECK: "{{.*}}save-stats.c"
 
 // RUN: %clang -target x86_64-apple-darwin -S %s -### 2>&1 | FileCheck %s -check-prefix=NO-STATS
-// NO-STATS-NO: -stats-file
+// NO-STATS-NOT: -stats-file
 // NO-STATS: "{{.*}}save-stats.c"
-// NO-STATS-NO: -stats-file
+// NO-STATS-NOT: -stats-file
 
 // RUN: %clang -target x86_64-apple-darwin -save-stats=obj -c -o obj/dir/save-stats.o %s -### 2>&1 | FileCheck %s -check-prefix=CHECK-OBJ
 // CHECK-OBJ: "-stats-file=obj/dir{{/|\\\\}}save-stats.stats"
@@ -49,7 +49,7 @@
 // RUN: env CC_PRINT_INTERNAL_STAT=1 \
 // RUN: %clang -target x86_64-apple-darwin %s -### 2>&1 | FileCheck %s -check-prefix=CHECK-ENV
 // CHECK-ENV: "-stats-file=-"
-// CHECK-ENV-NO: "stats-file-append"
+// CHECK-ENV-NOT: "stats-file-append"
 
 // RUN: env CC_PRINT_INTERNAL_STAT=1 \
 // RUN:     CC_PRINT_INTERNAL_STAT_FILE=/tmp/stats.json \
diff --git a/clang/test/Driver/x86-mtune.c b/clang/test/Driver/x86-mtune.c
index cf0c8766bcb80..f70a007d33ee9 100644
--- a/clang/test/Driver/x86-mtune.c
+++ b/clang/test/Driver/x86-mtune.c
@@ -32,7 +32,7 @@
 // -march should remove default mtune generic.
 // RUN: %clang -### -c --target=x86_64 %s -march=core2 -mtune=nehalem 2>&1 | FileCheck %s -check-prefix=marchmtune
 // marchmtune: "-target-cpu" "core2"
-// mmarchmtune: "-tune-cpu" "nehalem"
+// marchmtune: "-tune-cpu" "nehalem"
 
 // RUN: not %clang %s -target x86_64 -E -mtune=x86-64-v2 2>&1 | FileCheck %s --check-prefix=INVALID
 // RUN: not %clang %s -target x86_64 -E -mtune=x86-64-v3 2>&1 | FileCheck %s --check-prefix=INVALID
diff --git a/clang/test/Headers/openmp_new_nothrow.cpp b/clang/test/Headers/openmp_new_nothrow.cpp
index 1208387013547..8c8fa74866db3 100644
--- a/clang/test/Headers/openmp_new_nothrow.cpp
+++ b/clang/test/Headers/openmp_new_nothrow.cpp
@@ -1,6 +1,6 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
 // RUN: %clang_cc1 -std=c++03 -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -internal-isystem %S/Inputs/include -verify -fopenmp -x c++ -triple nvptx64-nvidia-cuda -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm -fopenmp-is-target-device -o - %s | FileCheck -check-prefixes=NVPTX,NVPTX-CXX03 %s
-// RUN: %clang_cc1 -std=c++11 -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -internal-isystem %S/Inputs/include -verify -fopenmp -x c++ -triple nvptx64-nvidia-cuda -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm -fopenmp-is-target-device -o - %s | FileCheck -check-prefixes=NVPTX,NVPTX-NVPTX-CXX11 %s
+// RUN: %clang_cc1 -std=c++11 -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -internal-isystem %S/Inputs/include -verify -fopenmp -x c++ -triple nvptx64-nvidia-cuda -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm -fopenmp-is-target-device -o - %s | FileCheck -check-prefixes=NVPTX,NVPTX-CXX11 %s
 
 // RUN: %clang_cc1 -std=c++03 -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -internal-isystem %S/Inputs/include -verify -fopenmp -x c++ -triple amdgcn-amd-amdhsa -fopenmp-targets=amdgcn-amd-amdhsa -emit-llvm -fopenmp-is-target-device -o - %s | FileCheck -check-prefixes=AMDGPU,AMDGPU-CXX03 %s
 // RUN: %clang_cc1 -std=c++11 -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -internal-isystem %S/Inputs/include -verify -fopenmp -x c++ -triple amdgcn-amd-amdhsa -fopenmp-targets=amdgcn-amd-amdhsa -emit-llvm -fopenmp-is-target-device -o - %s | FileCheck -check-prefixes=AMDGPU,AMDGPU-CXX11 %s
@@ -43,11 +43,11 @@ int* new_stuff_nothrow() {
 // NVPTX-CXX03-NEXT:    [[CALL:%.*]] = call noalias noundef ptr @_ZnamRKSt9nothrow_t(i64 noundef 136, ptr noundef nonnull align 1 dereferenceable(1) @nothrow) #[[ATTR4]]
 // NVPTX-CXX03-NEXT:    ret ptr [[CALL]]
 //
-// NVPTX-NVPTX-CXX11-LABEL: define hidden noundef ptr @_Z23new_array_stuff_nothrowv
-// NVPTX-NVPTX-CXX11-SAME: () #[[ATTR0]] {
-// NVPTX-NVPTX-CXX11-NEXT:  entry:
-// NVPTX-NVPTX-CXX11-NEXT:    [[CALL:%.*]] = call noalias noundef ptr @_ZnamRKSt9nothrow_t(i64 noundef 136, ptr noundef nonnull align 1 dereferenceable(1) @nothrow) #[[ATTR7:[0-9]+]]
-// NVPTX-NVPTX-CXX11-NEXT:    ret ptr [[CALL]]
+// NVPTX-CXX11-LABEL: define hidden noundef ptr @_Z23new_array_stuff_nothrowv
+// NVPTX-CXX11-SAME: () #[[ATTR0]] {
+// NVPTX-CXX11-NEXT:  entry:
+// NVPTX-CXX11-NEXT:    [[CALL:%.*]] = call noalias noundef ptr @_ZnamRKSt9nothrow_t(i64 noundef 136, ptr noundef nonnull align 1 dereferenceable(1) @nothrow) #[[ATTR7:[0-9]+]]
+// NVPTX-CXX11-NEXT:    ret ptr [[CALL]]
 //
 // AMDGPU-CXX03-LABEL: define hidden noundef ptr @_Z23new_array_stuff_nothrowv
 // AMDGPU-CXX03-SAME: () #[[ATTR0]] {
@@ -87,14 +87,14 @@ int* new_array_stuff_nothrow() {
 // NVPTX-CXX03-NEXT:    call void @_ZdlPvRKSt9nothrow_t(ptr noundef [[TMP0]], ptr noundef nonnull align 1 dereferenceable(1) @nothrow) #[[ATTR6:[0-9]+]]
 // NVPTX-CXX03-NEXT:    ret void
 //
-// NVPTX-NVPTX-CXX11-LABEL: define hidden void @_Z20delete_stuff_nothrowPi
-// NVPTX-NVPTX-CXX11-SAME: (ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
-// NVPTX-NVPTX-CXX11-NEXT:  entry:
-// NVPTX-NVPTX-CXX11-NEXT:    [[PTR_ADDR:%.*]] = alloca ptr, align 8
-// NVPTX-NVPTX-CXX11-NEXT:    store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
-// NVPTX-NVPTX-CXX11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
-// NVPTX-NVPTX-CXX11-NEXT:    call void @_ZdlPvRKSt9nothrow_t(ptr noundef [[TMP0]], ptr noundef nonnull align 1 dereferenceable(1) @nothrow) #[[ATTR8:[0-9]+]]
-// NVPTX-NVPTX-CXX11-NEXT:    ret void
+// NVPTX-CXX11-LABEL: define hidden void @_Z20delete_stuff_nothrowPi
+// NVPTX-CXX11-SAME: (ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
+// NVPTX-CXX11-NEXT:  entry:
+// NVPTX-CXX11-NEXT:    [[PTR_ADDR:%.*]] = alloca ptr, align 8
+// NVPTX-CXX11-NEXT:    store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
+// NVPTX-CXX11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
+// NVPTX-CXX11-NEXT:    call void @_ZdlPvRKSt9nothrow_t(ptr noundef [[TMP0]], ptr noundef nonnull align 1 dereferenceable(1) @nothrow) #[[ATTR8:[0-9]+]]
+// NVPTX-CXX11-NEXT:    ret void
 //
 // AMDGPU-CXX03-LABEL: define hidden void @_Z20delete_stuff_nothrowPi
 // AMDGPU-CXX03-SAME: (ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
@@ -138,14 +138,14 @@ void delete_stuff_nothrow(int* ptr) {
 // NVPTX-CXX03-NEXT:    call void @_ZdaPvRKSt9nothrow_t(ptr noundef [[TMP0]], ptr noundef nonnull align 1 dereferenceable(1) @nothrow) #[[ATTR6]]
 // NVPTX-CXX03-NEXT:    ret void
 //
-// NVPTX-NVPTX-CXX11-LABEL: define hidden void @_Z26delete_array_stuff_nothrowPi
-// NVPTX-NVPTX-CXX11-SAME: (ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
-// NVPTX-NVPTX-CXX11-NEXT:  entry:
-// NVPTX-NVPTX-CXX11-NEXT:    [[PTR_ADDR:%.*]] = alloca ptr, align 8
-// NVPTX-NVPTX-CXX11-NEXT:    store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
-// NVPTX-NVPTX-CXX11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
-// NVPTX-NVPTX-CXX11-NEXT:    call void @_ZdaPvRKSt9nothrow_t(ptr noundef [[TMP0]], ptr noundef nonnull align 1 dereferenceable(1) @nothrow) #[[ATTR8]]
-// NVPTX-NVPTX-CXX11-NEXT:    ret void
+// NVPTX-CXX11-LABEL: define hidden void @_Z26delete_array_stuff_nothrowPi
+// NVPTX-CXX11-SAME: (ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
+// NVPTX-CXX11-NEXT:  entry:
+// NVPTX-CXX11-NEXT:    [[PTR_ADDR:%.*]] = alloca ptr, align 8
+// NVPTX-CXX11-NEXT:    store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
+// NVPTX-CXX11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
+// NVPTX-CXX11-NEXT:    call void @_ZdaPvRKSt9nothrow_t(ptr noundef [[TMP0]], ptr noundef nonnull align 1 dereferenceable(1) @nothrow) #[[ATTR8]]
+// NVPTX-CXX11-NEXT:    ret void
 //
 // AMDGPU-CXX03-LABEL: define hidden void @_Z26delete_array_stuff_nothrowPi
 // AMDGPU-CXX03-SAME: (ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
diff --git a/clang/test/Misc/pragma-attribute-strict-subjects.c b/clang/test/Misc/pragma-attribute-strict-subjects.c
index 807977fb252aa..8b98ffeb220e6 100644
--- a/clang/test/Misc/pragma-attribute-strict-subjects.c
+++ b/clang/test/Misc/pragma-attribute-strict-subjects.c
@@ -68,7 +68,7 @@ struct testRecoverExtraStruct { };
 
 enum testNoEnumAbiTag { CaseCase };
 // CHECK-LABEL: EnumDecl{{.*}} testNoEnumAbiTag
-// CHECK-NO: AbiTagAttr
+// CHECK-NOT: AbiTagAttr
 
 #pragma clang attribute pop
 
diff --git a/clang/test/OpenMP/metadirective_implementation_codegen.c b/clang/test/OpenMP/metadirective_implementation_codegen.c
index da09b639d6d40..2c45704ad531b 100644
--- a/clang/test/OpenMP/metadirective_implementation_codegen.c
+++ b/clang/test/OpenMP/metadirective_implementation_codegen.c
@@ -54,8 +54,8 @@ void foo(void) {
 // CHECK: ret void
 
 // CHECK: define internal void @foo.omp_outlined.3(
-// NO-CHECK: call void @__kmpc_for_static_init
-// NO-CHECK: call void @__kmpc_for_static_fini
+// CHECK-NOT: call void @__kmpc_for_static_init
+// CHECK-NOT: call void @__kmpc_for_static_fini
 // CHECK: ret void
 
 // CHECK: define internal void @foo.omp_outlined.4(
@@ -64,8 +64,8 @@ void foo(void) {
 // CHECK: ret void
 
 // CHECK: define internal void @foo.omp_outlined.5(
-// NO-CHECK: call void @__kmpc_for_static_init
-// NO-CHECK: call void @__kmpc_for_static_fini
+// CHECK-NOT: call void @__kmpc_for_static_init
+// CHECK-NOT: call void @__kmpc_for_static_fini
 // CHECK: ret void
 
 #endif
diff --git a/clang/test/OpenMP/metadirective_implementation_codegen.cpp b/clang/test/OpenMP/metadirective_implementation_codegen.cpp
index b9f43d1a1e87c..6cc63571e6700 100644
--- a/clang/test/OpenMP/metadirective_implementation_codegen.cpp
+++ b/clang/test/OpenMP/metadirective_implementation_codegen.cpp
@@ -59,8 +59,8 @@ void foo() {
 // CHECK: ret void
 
 // CHECK: define internal void [[OUTLINED_5]](
-// NO-CHECK: call void @__kmpc_for_static_init
-// NO-CHECK: call void @__kmpc_for_static_fini
+// CHECK-NOT: call void @__kmpc_for_static_init
+// CHECK-NOT: call void @__kmpc_for_static_fini
 // CHECK: ret void
 
 // CHECK: define internal void [[OUTLINED_6]](
@@ -69,8 +69,8 @@ void foo() {
 // CHECK: ret void
 
 // CHECK: define internal void [[OUTLINED_7]](
-// NO-CHECK: call void @__kmpc_for_static_init
-// NO-CHECK: call void @__kmpc_for_static_fini
+// CHECK-NOT: call void @__kmpc_for_static_init
+// CHECK-NOT: call void @__kmpc_for_static_fini
 // CHECK: ret void
 
 #endif
diff --git a/clang/test/OpenMP/nested_loop_codegen.cpp b/clang/test/OpenMP/nested_loop_codegen.cpp
index a08950e2e55c7..4cc2651c6fe9d 100644
--- a/clang/test/OpenMP/nested_loop_codegen.cpp
+++ b/clang/test/OpenMP/nested_loop_codegen.cpp
@@ -42,26 +42,26 @@ int inline_decl() {
 }
 
 #endif
-// CHECK1-NEXT     [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK1-NEXT     [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
-// CHECK1-NEXT     call void @__kmpc_for_static_init_4(ptr @1, i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-//CHECK1     cond.end:
-//CHECK1     omp.inner.for.cond:
-//CHECK1     omp.inner.for.body:
-//CHECK1     omp.body.continue:
-//CHECK1     omp.inner.for.inc:
-//CHECK1     omp.inner.for.end:
-//CHECK1     omp.loop.exit:
-// CHECK1-NEXT     [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK1-NEXT     [[TMP14:%.*]] = load i32, ptr [[TMP12]], align 4
-// CHECK1-NEXT     call void @__kmpc_for_static_fini(ptr @1, i32 [[TMP14]])
-// CHECK1-NEXT     [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK1-NEXT     [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4
-// CHECK1-NEXT     call void @__kmpc_barrier(ptr @2, i32 [[TMP16]])
-//CHECK1     for.inc:
-//CHECK1     for.end:
-// CHECK1-NEXT     ret void
-// CHECK2-NEXT    br label [[FOR_INC]], !dbg !119
+// CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
+// CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @1, i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+//CHECK1:    cond.end:
+//CHECK1:    omp.inner.for.cond:
+//CHECK1:    omp.inner.for.body:
+//CHECK1:    omp.body.continue:
+//CHECK1:    omp.inner.for.inc:
+//CHECK1:    omp.inner.for.end:
+//CHECK1:    omp.loop.exit:
+// CHECK1-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP12]], align 4
+// CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @1, i32 [[TMP14]])
+// CHECK1-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4
+// CHECK1-NEXT:    call void @__kmpc_barrier(ptr @2, i32 [[TMP16]])
+//CHECK1:    for.inc:
+//CHECK1:    for.end:
+// CHECK1-NEXT:    ret void
+// CHECK2-NEXT:   br label [[FOR_INC]], !dbg !119
 // CHECK1-LABEL: define {{[^@]+}}@_Z12outline_declv
 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
 // CHECK1-NEXT:  entry:
diff --git a/clang/test/OpenMP/nvptx_lambda_pointer_capturing.cpp b/clang/test/OpenMP/nvptx_lambda_pointer_capturing.cpp
index 5443597305a1c..c5cbbd09afbf0 100644
--- a/clang/test/OpenMP/nvptx_lambda_pointer_capturing.cpp
+++ b/clang/test/OpenMP/nvptx_lambda_pointer_capturing.cpp
@@ -149,8 +149,8 @@ int main()
 // CHECK: [[L0:%.+]] = load ptr, ptr [[BODY]]
 // CHECK: store ptr [[L0]], ptr [[TMP]]
 // CHECK: [[L5:%.+]] = load ptr, ptr [[TMP]]
-// CHECK-NOT [[L6:%.+]] = load ptr, ptr [[TMP]]
-// CHECK-NOT [[L7:%.+]] = load ptr, ptr [[TMP]]
+// CHECK-NOT: [[L6:%.+]] = load ptr, ptr [[TMP]]
+// CHECK-NOT: [[L7:%.+]] = load ptr, ptr [[TMP]]
 // CHECK: store ptr [[REF_TMP]], ptr [[BODY_REF]]
 // CHECK:[[L47:%.+]] =  load ptr, ptr [[BODY_REF]]
 // CHECK: store ptr [[L47]], ptr [[TMP8]]
diff --git a/clang/test/OpenMP/parallel_for_simd_codegen.cpp b/clang/test/OpenMP/parallel_for_simd_codegen.cpp
index 893b4bd556f6a..00372d9bb91bc 100644
--- a/clang/test/OpenMP/parallel_for_simd_codegen.cpp
+++ b/clang/test/OpenMP/parallel_for_simd_codegen.cpp
@@ -804,7 +804,7 @@ for (int i = 0; i < 10; ++i);
 // OMP45-DAG: ![[VM]] = !{!"llvm.loop.vectorize.enable", i1 true}
 // OMP45-NOT: !{!"llvm.loop.vectorize.enable", i1 false}
 // OMP50-DAG: ![[VECT]] = distinct !{![[VECT]], ![[PA:.+]], ![[VM:.+]]}
-// OMP50-DAG  ![[PA]] = !{!"llvm.loop.parallel_accesses", !{{.+}}}
+// OMP50-DAG: ![[PA]] = !{!"llvm.loop.parallel_accesses", !{{.+}}}
 // OMP50-DAG: ![[VM]] = !{!"llvm.loop.vectorize.enable", i1 true}
 // OMP50-DAG: ![[NOVECT]] = distinct !{![[NOVECT]], ![[NOVM:.+]]}
 // OMP50-DAG: ![[NOVM]] = !{!"llvm.loop.vectorize.enable", i1 false}
diff --git a/clang/test/OpenMP/reduction_implicit_map.cpp b/clang/test/OpenMP/reduction_implicit_map.cpp
index a7db3da7d1f86..013b0f8adf6f0 100644
--- a/clang/test/OpenMP/reduction_implicit_map.cpp
+++ b/clang/test/OpenMP/reduction_implicit_map.cpp
@@ -34,7 +34,7 @@ int foo(int n) {
   ;
   return 0;
 }
-// CHECK-NOT @.offload_maptypes
+// CHECK-NOT: @.offload_maptypes
 #elif defined(DIAG)
 class S2 {
   mutable int a;
diff --git a/clang/test/OpenMP/simd_codegen.cpp b/clang/test/OpenMP/simd_codegen.cpp
index b96e4213e8e0e..113d773e057c3 100644
--- a/clang/test/OpenMP/simd_codegen.cpp
+++ b/clang/test/OpenMP/simd_codegen.cpp
@@ -55,7 +55,7 @@ void simple(float *a, float *b, float *c, float *d) {
 // CHECK-NEXT: store i32 [[CALC_I_2]], ptr [[LC_I:.+]]{{.*}}!llvm.access.group
 // ... loop body ...
 // End of body: store into a[i]:
-// OMP45-NOT: load ptr,{{.*}}!nontemporal
+// OMP5-NOT: load ptr,{{.*}}!nontemporal
 // CHECK-NOT: load float,{{.*}}!nontemporal
 // OMP5: load ptr,{{.*}}!nontemporal
 // OMP5: load ptr,{{.*}}!nontemporal
diff --git a/clang/test/OpenMP/target_defaultmap_codegen_01.cpp b/clang/test/OpenMP/target_defaultmap_codegen_01.cpp
index ce862632dd940..95068c8da6567 100644
--- a/clang/test/OpenMP/target_defaultmap_codegen_01.cpp
+++ b/clang/test/OpenMP/target_defaultmap_codegen_01.cpp
@@ -207,7 +207,7 @@ void implicit_maps_double (int a){
 // CK4-64-DAG: store i[[sz:64|32]] [[VAL:%[^,]+]], ptr [[BP1]]
 // CK4-64-DAG: store i[[sz]] [[VAL]], ptr [[P1]]
 // CK4-64-DAG: [[VAL]] = load i[[sz]], ptr [[ADDR:%.+]],
-// CK4-64-64-DAG: store double {{.+}}, ptr [[ADDR]],
+// CK4-64-DAG: store double {{.+}}, ptr [[ADDR]],
 
 // CK4-32-DAG: store ptr [[DECL:%[^,]+]], ptr [[BP1]]
 // CK4-32-DAG: store ptr [[DECL]], ptr [[P1]]
@@ -1120,7 +1120,7 @@ void implicit_maps_double (int a){
 // CK20-64-DAG: store i[[sz:64|32]] [[VAL:%[^,]+]], ptr [[BP1]]
 // CK20-64-DAG: store i[[sz]] [[VAL]], ptr [[P1]]
 // CK20-64-DAG: [[VAL]] = load i[[sz]], ptr [[ADDR:%.+]],
-// CK20-64-64-DAG: store double {{.+}}, ptr [[ADDR]],
+// CK20-64-DAG: store double {{.+}}, ptr [[ADDR]],
 
 // CK20-32-DAG: store ptr [[DECL:%[^,]+]], ptr [[BP1]]
 // CK20-32-DAG: store ptr [[DECL]], ptr [[P1]]
diff --git a/clang/test/OpenMP/target_map_codegen_06.cpp b/clang/test/OpenMP/target_map_codegen_06.cpp
index ca052581bbf67..92d54ab9ccc56 100644
--- a/clang/test/OpenMP/target_map_codegen_06.cpp
+++ b/clang/test/OpenMP/target_map_codegen_06.cpp
@@ -61,7 +61,7 @@ void implicit_maps_double (int a){
 // CK7-64-DAG: store i[[sz:64|32]] [[VAL:%[^,]+]], ptr [[BP1]]
 // CK7-64-DAG: store i[[sz]] [[VAL]], ptr [[P1]]
 // CK7-64-DAG: [[VAL]] = load i[[sz]], ptr [[ADDR:%.+]],
-// CK7-64-64-DAG: store double {{.+}}, ptr [[ADDR]],
+// CK7-64-DAG: store double {{.+}}, ptr [[ADDR]],
 
 // CK7-32-DAG: store ptr [[DECL:%[^,]+]], ptr [[BP1]]
 // CK7-32-DAG: store ptr [[DECL]], ptr [[P1]]
diff --git a/clang/test/OpenMP/target_map_codegen_34.cpp b/clang/test/OpenMP/target_map_codegen_34.cpp
index beb1e895527ae..f3a92ee05abbb 100644
--- a/clang/test/OpenMP/target_map_codegen_34.cpp
+++ b/clang/test/OpenMP/target_map_codegen_34.cpp
@@ -137,7 +137,7 @@ void default_mapper() {
   #pragma omp target map(to: s)
   s.foo();
 
-  // CK34 : call void
+  // CK34: call void
 
   // CK34-DAG: call i32 @__tgt_target_kernel(ptr @{{.+}}, i64 -1, i32 -1, i32 0, ptr @.{{.+}}.region_id, ptr [[ARGS:%.+]])
   // CK34-DAG: [[BPARG:%.+]] = getelementptr inbounds {{.+}}[[ARGS]], i32 0, i32 2
diff --git a/clang/test/OpenMP/target_map_codegen_35.cpp b/clang/test/OpenMP/target_map_codegen_35.cpp
index d061acf66321d..e1671d680b87d 100644
--- a/clang/test/OpenMP/target_map_codegen_35.cpp
+++ b/clang/test/OpenMP/target_map_codegen_35.cpp
@@ -122,7 +122,7 @@ void ref_map() {
   #pragma omp target map(to: s, s.b)
   s.foo();
 
-  // CK35 : call void
+  // CK35: call void
 
   // CK35-DAG: call i32 @__tgt_target_kernel(ptr @{{.+}}, i64 -1, i32 -1, i32 0, ptr @.{{.+}}.region_id, ptr [[ARGS:%.+]])
   // CK35-DAG: [[BPARG:%.+]] = getelementptr inbounds {{.+}}[[ARGS]], i32 0, i32 2
diff --git a/clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp b/clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
index caafd8b9cf2f9..464338d8861fb 100644
--- a/clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
+++ b/clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
@@ -41,7 +41,7 @@
 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix OMP-DEFAULT
 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix OMP-DEFAULT
-// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix OMP-DEfAULT
+// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix OMP-DEFAULT
 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix OMP-DEFAULT
 
@@ -3982,2237 +3982,2237 @@ int bar(int a){
 //
 //
 //
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init
-// OMP-DEfAULT-SAME: () #[[ATTR0:[0-9]+]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @_ZL2a1, ptr @__dso_handle) #[[ATTR2:[0-9]+]]
-// OMP-DEfAULT-NEXT:    ret void
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init
+// OMP-DEFAULT-SAME: () #[[ATTR0:[0-9]+]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @_ZL2a1, ptr @__dso_handle) #[[ATTR2:[0-9]+]]
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SAC1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    call void @_ZN2SAC2Ev(ptr noundef nonnull align 4 dereferenceable(16) [[THIS1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SAD1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    call void @_ZN2SAD2Ev(ptr noundef nonnull align 4 dereferenceable(16) [[THIS1]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SAC2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 2
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SAD2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 3
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    ret void
 //
 //
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SAC1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    call void @_ZN2SAC2Ev(ptr noundef nonnull align 4 dereferenceable(16) [[THIS1]])
-// OMP-DEfAULT-NEXT:    ret void
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @a2)
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @a2, ptr @__dso_handle) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    ret void
 //
 //
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SAD1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    call void @_ZN2SAD2Ev(ptr noundef nonnull align 4 dereferenceable(16) [[THIS1]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    ret void
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b1)
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b1, ptr @__dso_handle) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    ret void
+//
 //
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SBC1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    call void @_ZN2SBC2Ev(ptr noundef nonnull align 4 dereferenceable(32) [[THIS1]])
+// OMP-DEFAULT-NEXT:    ret void
 //
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SAC2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 2
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    ret void
 //
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SBD1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    call void @_ZN2SBD2Ev(ptr noundef nonnull align 4 dereferenceable(32) [[THIS1]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    ret void
 //
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SAD2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 3
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    ret void
 //
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SBC2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 5
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    ret void
 //
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @a2)
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @a2, ptr @__dso_handle) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    ret void
 //
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SBD2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 6
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.3
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b2)
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b2, ptr @__dso_handle) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.4
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    call void @_ZN2SCC1Ev(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SCD1Ev, ptr @_ZL2c1, ptr @__dso_handle) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SCC1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    call void @_ZN2SCC2Ev(ptr noundef nonnull align 4 dereferenceable(64) [[THIS1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SCD1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    call void @_ZN2SCD2Ev(ptr noundef nonnull align 4 dereferenceable(64) [[THIS1]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SCC2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT:    store ptr @.offload_sizes, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT:    store ptr @.offload_maptypes, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT:       omp_offload.failed:
+// OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT:       omp_offload.cont:
+// OMP-DEFAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3:[0-9]+]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT:       cond.true:
+// OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
+// OMP-DEFAULT:       cond.false:
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    br label [[COND_END]]
+// OMP-DEFAULT:       cond.end:
+// OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT:       omp.inner.for.cond:
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT:       omp.inner.for.body:
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 8
+// OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT:       omp.body.continue:
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT:       omp.inner.for.inc:
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT:       omp.inner.for.end:
+// OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT:       omp.loop.exit:
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SCD2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    ret void
 //
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b1)
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b1, ptr @__dso_handle) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    ret void
 //
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SBC1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    call void @_ZN2SBC2Ev(ptr noundef nonnull align 4 dereferenceable(32) [[THIS1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SBD1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    call void @_ZN2SBD2Ev(ptr noundef nonnull align 4 dereferenceable(32) [[THIS1]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SBC2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 5
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SBD2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 6
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.3
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b2)
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b2, ptr @__dso_handle) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.4
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    call void @_ZN2SCC1Ev(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SCD1Ev, ptr @_ZL2c1, ptr @__dso_handle) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SCC1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    call void @_ZN2SCC2Ev(ptr noundef nonnull align 4 dereferenceable(64) [[THIS1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SCD1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    call void @_ZN2SCD2Ev(ptr noundef nonnull align 4 dereferenceable(64) [[THIS1]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SCC2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT:    store ptr @.offload_sizes, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT:       omp_offload.failed:
-// OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT:       omp_offload.cont:
-// OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3:[0-9]+]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT:       cond.true:
-// OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
-// OMP-DEfAULT:       cond.false:
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    br label [[COND_END]]
-// OMP-DEfAULT:       cond.end:
-// OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT:       omp.inner.for.cond:
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT:       omp.inner.for.body:
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 8
-// OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT:       omp.body.continue:
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT:       omp.inner.for.inc:
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT:       omp.inner.for.end:
-// OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT:       omp.loop.exit:
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SCD2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.5
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    call void @_ZN2SDC1Ev(ptr noundef nonnull align 4 dereferenceable(128) @d1)
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SDD1Ev, ptr @d1, ptr @__dso_handle) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SDC1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    call void @_ZN2SDC2Ev(ptr noundef nonnull align 4 dereferenceable(128) [[THIS1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SDD1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    call void @_ZN2SDD2Ev(ptr noundef nonnull align 4 dereferenceable(128) [[THIS1]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SDC2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 11
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SDD2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.6, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.7, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT:       omp_offload.failed:
-// OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT:       omp_offload.cont:
-// OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT:       cond.true:
-// OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
-// OMP-DEfAULT:       cond.false:
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    br label [[COND_END]]
-// OMP-DEfAULT:       cond.end:
-// OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT:       omp.inner.for.cond:
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT:       omp.inner.for.body:
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 12
-// OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT:       omp.body.continue:
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT:       omp.inner.for.inc:
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT:       omp.inner.for.end:
-// OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT:       omp.loop.exit:
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.8
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    call void @_ZN2SEC1Ev(ptr noundef nonnull align 4 dereferenceable(256) @e1)
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SED1Ev, ptr @e1, ptr @__dso_handle) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SEC1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    call void @_ZN2SEC2Ev(ptr noundef nonnull align 4 dereferenceable(256) [[THIS1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SED1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    call void @_ZN2SED2Ev(ptr noundef nonnull align 4 dereferenceable(256) [[THIS1]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SEC2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.9, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.10, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT:       omp_offload.failed:
-// OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT:       omp_offload.cont:
-// OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT:       cond.true:
-// OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
-// OMP-DEfAULT:       cond.false:
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    br label [[COND_END]]
-// OMP-DEfAULT:       cond.end:
-// OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT:       omp.inner.for.cond:
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT:       omp.inner.for.body:
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 14
-// OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT:       omp.body.continue:
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT:       omp.inner.for.inc:
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT:       omp.inner.for.end:
-// OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT:       omp.loop.exit:
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SED2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.11, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.12, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT:       omp_offload.failed:
-// OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT:       omp_offload.cont:
-// OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT:       cond.true:
-// OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
-// OMP-DEfAULT:       cond.false:
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    br label [[COND_END]]
-// OMP-DEfAULT:       cond.end:
-// OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT:       omp.inner.for.cond:
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT:       omp.inner.for.body:
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 15
-// OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT:       omp.body.continue:
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT:       omp.inner.for.inc:
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT:       omp.inner.for.end:
-// OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT:       omp.loop.exit:
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.13
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    call void @_ZN2STILi100EEC1Ev(ptr noundef nonnull align 4 dereferenceable(912) @t1)
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi100EED1Ev, ptr @t1, ptr @__dso_handle) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EEC1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    call void @_ZN2STILi100EEC2Ev(ptr noundef nonnull align 4 dereferenceable(912) [[THIS1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EED1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    call void @_ZN2STILi100EED2Ev(ptr noundef nonnull align 4 dereferenceable(912) [[THIS1]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EEC2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.14, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.15, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT:       omp_offload.failed:
-// OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT:       omp_offload.cont:
-// OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT:       cond.true:
-// OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
-// OMP-DEfAULT:       cond.false:
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    br label [[COND_END]]
-// OMP-DEfAULT:       cond.end:
-// OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT:       omp.inner.for.cond:
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT:       omp.inner.for.body:
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 117
-// OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT:       omp.body.continue:
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT:       omp.inner.for.inc:
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT:       omp.inner.for.end:
-// OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT:       omp.loop.exit:
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EED2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.16, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.17, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT:       omp_offload.failed:
-// OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT:       omp_offload.cont:
-// OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT:       cond.true:
-// OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
-// OMP-DEfAULT:       cond.false:
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    br label [[COND_END]]
-// OMP-DEfAULT:       cond.end:
-// OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT:       omp.inner.for.cond:
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT:       omp.inner.for.body:
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 118
-// OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT:       omp.body.continue:
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT:       omp.inner.for.inc:
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT:       omp.inner.for.end:
-// OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT:       omp.loop.exit:
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.18
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    call void @_ZN2STILi1000EEC1Ev(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi1000EED1Ev, ptr @t2, ptr @__dso_handle) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EEC1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    call void @_ZN2STILi1000EEC2Ev(ptr noundef nonnull align 4 dereferenceable(4512) [[THIS1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EED1Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    call void @_ZN2STILi1000EED2Ev(ptr noundef nonnull align 4 dereferenceable(4512) [[THIS1]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EEC2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.19, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.20, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT:       omp_offload.failed:
-// OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT:       omp_offload.cont:
-// OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT:       cond.true:
-// OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
-// OMP-DEfAULT:       cond.false:
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    br label [[COND_END]]
-// OMP-DEfAULT:       cond.end:
-// OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT:       omp.inner.for.cond:
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT:       omp.inner.for.body:
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1017
-// OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT:       omp.body.continue:
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT:       omp.inner.for.inc:
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT:       omp.inner.for.end:
-// OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT:       omp.loop.exit:
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EED2Ev
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.21, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.22, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT:       omp_offload.failed:
-// OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT:       omp_offload.cont:
-// OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT:       cond.true:
-// OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
-// OMP-DEfAULT:       cond.false:
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    br label [[COND_END]]
-// OMP-DEfAULT:       cond.end:
-// OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT:       omp.inner.for.cond:
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT:       omp.inner.for.body:
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1018
-// OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT:       omp.body.continue:
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT:       omp.inner.for.inc:
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT:       omp.inner.for.end:
-// OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT:       omp.loop.exit:
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_Z3bari
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR1]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[R:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[R_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[R]], align 4
-// OMP-DEfAULT-NEXT:    call void @_ZN2SA3fooEv(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
-// OMP-DEfAULT-NEXT:    call void @_ZN2SA3fooEv(ptr noundef nonnull align 4 dereferenceable(16) @a2)
-// OMP-DEfAULT-NEXT:    call void @_ZN2SB3fooEv(ptr noundef nonnull align 4 dereferenceable(32) @b1)
-// OMP-DEfAULT-NEXT:    call void @_ZN2SB3fooEv(ptr noundef nonnull align 4 dereferenceable(32) @b2)
-// OMP-DEfAULT-NEXT:    call void @_ZN2SC3fooEv(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
-// OMP-DEfAULT-NEXT:    call void @_ZN2SD3fooEv(ptr noundef nonnull align 4 dereferenceable(128) @d1)
-// OMP-DEfAULT-NEXT:    call void @_ZN2SE3fooEv(ptr noundef nonnull align 4 dereferenceable(256) @e1)
-// OMP-DEfAULT-NEXT:    call void @_ZN2STILi100EE3fooEv(ptr noundef nonnull align 4 dereferenceable(912) @t1)
-// OMP-DEfAULT-NEXT:    call void @_ZN2STILi1000EE3fooEv(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[R]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[R_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[R_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[TMP3]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 3, ptr [[TMP8]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT:    store ptr [[TMP6]], ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.23, ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.24, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP16]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP18]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
-// OMP-DEfAULT-NEXT:    br i1 [[TMP22]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT:       omp_offload.failed:
-// OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267(i32 [[TMP2]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT:       omp_offload.cont:
-// OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = load i32, ptr [[R]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP25]]
-// OMP-DEfAULT-NEXT:    ret i32 [[ADD]]
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SA3fooEv
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 1
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SB3fooEv
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.25, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.26, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT:       omp_offload.failed:
-// OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT:       omp_offload.cont:
-// OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SC3fooEv
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 7
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SD3fooEv
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 10
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SE3fooEv
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EE3fooEv
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.27, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.28, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT:       omp_offload.failed:
-// OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT:       omp_offload.cont:
-// OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EE3fooEv
-// OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
-// OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
-// OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
-// OMP-DEfAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
-// OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
-// OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
-// OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.29, ptr [[TMP13]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
-// OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.30, ptr [[TMP14]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
-// OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
-// OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
-// OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
-// OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
-// OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211.region_id, ptr [[KERNEL_ARGS]])
-// OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
-// OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
-// OMP-DEfAULT:       omp_offload.failed:
-// OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211(i32 [[TMP3]]) #[[ATTR2]]
-// OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
-// OMP-DEfAULT:       omp_offload.cont:
-// OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267
-// OMP-DEfAULT-SAME: (i32 noundef [[R:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[R_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[R_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[R]], ptr [[R_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[R_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[R_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[R_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[R:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[R_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[R]], ptr [[R_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT:       cond.true:
-// OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
-// OMP-DEfAULT:       cond.false:
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    br label [[COND_END]]
-// OMP-DEfAULT:       cond.end:
-// OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT:       omp.inner.for.cond:
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT:       omp.inner.for.body:
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[R_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP8]], 1
-// OMP-DEfAULT-NEXT:    store i32 [[INC]], ptr [[R_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT:       omp.body.continue:
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT:       omp.inner.for.inc:
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT:       omp.inner.for.end:
-// OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT:       omp.loop.exit:
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT:       cond.true:
-// OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
-// OMP-DEfAULT:       cond.false:
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    br label [[COND_END]]
-// OMP-DEfAULT:       cond.end:
-// OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT:       omp.inner.for.cond:
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT:       omp.inner.for.body:
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 4
-// OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT:       omp.body.continue:
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT:       omp.inner.for.inc:
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT:       omp.inner.for.end:
-// OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT:       omp.loop.exit:
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT:       cond.true:
-// OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
-// OMP-DEfAULT:       cond.false:
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    br label [[COND_END]]
-// OMP-DEfAULT:       cond.end:
-// OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT:       omp.inner.for.cond:
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT:       omp.inner.for.body:
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 13
-// OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT:       omp.body.continue:
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT:       omp.inner.for.inc:
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT:       omp.inner.for.end:
-// OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT:       omp.loop.exit:
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT:       cond.true:
-// OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
-// OMP-DEfAULT:       cond.false:
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    br label [[COND_END]]
-// OMP-DEfAULT:       cond.end:
-// OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT:       omp.inner.for.cond:
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT:       omp.inner.for.body:
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 116
-// OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT:       omp.body.continue:
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT:       omp.inner.for.inc:
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT:       omp.inner.for.end:
-// OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT:       omp.loop.exit:
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211
-// OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
-// OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211.omp_outlined, i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211.omp_outlined
-// OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
-// OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
-// OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
-// OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
-// OMP-DEfAULT:       cond.true:
-// OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
-// OMP-DEfAULT:       cond.false:
-// OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    br label [[COND_END]]
-// OMP-DEfAULT:       cond.end:
-// OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
-// OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
-// OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
-// OMP-DEfAULT:       omp.inner.for.cond:
-// OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-// OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
-// OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
-// OMP-DEfAULT:       omp.inner.for.body:
-// OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
-// OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
-// OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
-// OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1016
-// OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
-// OMP-DEfAULT:       omp.body.continue:
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
-// OMP-DEfAULT:       omp.inner.for.inc:
-// OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
-// OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
-// OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
-// OMP-DEfAULT:       omp.inner.for.end:
-// OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
-// OMP-DEfAULT:       omp.loop.exit:
-// OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_GLOBAL__I_000500
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    call void @__cxx_global_var_init()
-// OMP-DEfAULT-NEXT:    call void @__cxx_global_var_init.2()
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_GLOBAL__I_000501
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    call void @__cxx_global_var_init.3()
-// OMP-DEfAULT-NEXT:    ret void
-//
-//
-// OMP-DEfAULT-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_parallel_generic_loop_codegen_1.cpp
-// OMP-DEfAULT-SAME: () #[[ATTR0]] {
-// OMP-DEfAULT-NEXT:  entry:
-// OMP-DEfAULT-NEXT:    call void @__cxx_global_var_init.1()
-// OMP-DEfAULT-NEXT:    call void @__cxx_global_var_init.4()
-// OMP-DEfAULT-NEXT:    call void @__cxx_global_var_init.5()
-// OMP-DEfAULT-NEXT:    call void @__cxx_global_var_init.8()
-// OMP-DEfAULT-NEXT:    call void @__cxx_global_var_init.13()
-// OMP-DEfAULT-NEXT:    call void @__cxx_global_var_init.18()
-// OMP-DEfAULT-NEXT:    ret void
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.5
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    call void @_ZN2SDC1Ev(ptr noundef nonnull align 4 dereferenceable(128) @d1)
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SDD1Ev, ptr @d1, ptr @__dso_handle) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SDC1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    call void @_ZN2SDC2Ev(ptr noundef nonnull align 4 dereferenceable(128) [[THIS1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SDD1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    call void @_ZN2SDD2Ev(ptr noundef nonnull align 4 dereferenceable(128) [[THIS1]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SDC2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 11
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SDD2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT:    store ptr @.offload_sizes.6, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT:    store ptr @.offload_maptypes.7, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT:       omp_offload.failed:
+// OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT:       omp_offload.cont:
+// OMP-DEFAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT:       cond.true:
+// OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
+// OMP-DEFAULT:       cond.false:
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    br label [[COND_END]]
+// OMP-DEFAULT:       cond.end:
+// OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT:       omp.inner.for.cond:
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT:       omp.inner.for.body:
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 12
+// OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT:       omp.body.continue:
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT:       omp.inner.for.inc:
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT:       omp.inner.for.end:
+// OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT:       omp.loop.exit:
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.8
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    call void @_ZN2SEC1Ev(ptr noundef nonnull align 4 dereferenceable(256) @e1)
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SED1Ev, ptr @e1, ptr @__dso_handle) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SEC1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    call void @_ZN2SEC2Ev(ptr noundef nonnull align 4 dereferenceable(256) [[THIS1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SED1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    call void @_ZN2SED2Ev(ptr noundef nonnull align 4 dereferenceable(256) [[THIS1]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SEC2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT:    store ptr @.offload_sizes.9, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT:    store ptr @.offload_maptypes.10, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT:       omp_offload.failed:
+// OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT:       omp_offload.cont:
+// OMP-DEFAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT:       cond.true:
+// OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
+// OMP-DEFAULT:       cond.false:
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    br label [[COND_END]]
+// OMP-DEFAULT:       cond.end:
+// OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT:       omp.inner.for.cond:
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT:       omp.inner.for.body:
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 14
+// OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT:       omp.body.continue:
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT:       omp.inner.for.inc:
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT:       omp.inner.for.end:
+// OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT:       omp.loop.exit:
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SED2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT:    store ptr @.offload_sizes.11, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT:    store ptr @.offload_maptypes.12, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT:       omp_offload.failed:
+// OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT:       omp_offload.cont:
+// OMP-DEFAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT:       cond.true:
+// OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
+// OMP-DEFAULT:       cond.false:
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    br label [[COND_END]]
+// OMP-DEFAULT:       cond.end:
+// OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT:       omp.inner.for.cond:
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT:       omp.inner.for.body:
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 15
+// OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT:       omp.body.continue:
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT:       omp.inner.for.inc:
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT:       omp.inner.for.end:
+// OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT:       omp.loop.exit:
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.13
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    call void @_ZN2STILi100EEC1Ev(ptr noundef nonnull align 4 dereferenceable(912) @t1)
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi100EED1Ev, ptr @t1, ptr @__dso_handle) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EEC1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    call void @_ZN2STILi100EEC2Ev(ptr noundef nonnull align 4 dereferenceable(912) [[THIS1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EED1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    call void @_ZN2STILi100EED2Ev(ptr noundef nonnull align 4 dereferenceable(912) [[THIS1]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EEC2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT:    store ptr @.offload_sizes.14, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT:    store ptr @.offload_maptypes.15, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT:       omp_offload.failed:
+// OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT:       omp_offload.cont:
+// OMP-DEFAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT:       cond.true:
+// OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
+// OMP-DEFAULT:       cond.false:
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    br label [[COND_END]]
+// OMP-DEFAULT:       cond.end:
+// OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT:       omp.inner.for.cond:
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT:       omp.inner.for.body:
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 117
+// OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT:       omp.body.continue:
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT:       omp.inner.for.inc:
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT:       omp.inner.for.end:
+// OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT:       omp.loop.exit:
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EED2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT:    store ptr @.offload_sizes.16, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT:    store ptr @.offload_maptypes.17, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT:       omp_offload.failed:
+// OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT:       omp_offload.cont:
+// OMP-DEFAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT:       cond.true:
+// OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
+// OMP-DEFAULT:       cond.false:
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    br label [[COND_END]]
+// OMP-DEFAULT:       cond.end:
+// OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT:       omp.inner.for.cond:
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT:       omp.inner.for.body:
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 118
+// OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT:       omp.body.continue:
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT:       omp.inner.for.inc:
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT:       omp.inner.for.end:
+// OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT:       omp.loop.exit:
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.18
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    call void @_ZN2STILi1000EEC1Ev(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi1000EED1Ev, ptr @t2, ptr @__dso_handle) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EEC1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    call void @_ZN2STILi1000EEC2Ev(ptr noundef nonnull align 4 dereferenceable(4512) [[THIS1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EED1Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    call void @_ZN2STILi1000EED2Ev(ptr noundef nonnull align 4 dereferenceable(4512) [[THIS1]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EEC2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT:    store ptr @.offload_sizes.19, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT:    store ptr @.offload_maptypes.20, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT:       omp_offload.failed:
+// OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT:       omp_offload.cont:
+// OMP-DEFAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT:       cond.true:
+// OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
+// OMP-DEFAULT:       cond.false:
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    br label [[COND_END]]
+// OMP-DEFAULT:       cond.end:
+// OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT:       omp.inner.for.cond:
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT:       omp.inner.for.body:
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1017
+// OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT:       omp.body.continue:
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT:       omp.inner.for.inc:
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT:       omp.inner.for.end:
+// OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT:       omp.loop.exit:
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EED2Ev
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT:    store ptr @.offload_sizes.21, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT:    store ptr @.offload_maptypes.22, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT:       omp_offload.failed:
+// OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT:       omp_offload.cont:
+// OMP-DEFAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT:       cond.true:
+// OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
+// OMP-DEFAULT:       cond.false:
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    br label [[COND_END]]
+// OMP-DEFAULT:       cond.end:
+// OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT:       omp.inner.for.cond:
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT:       omp.inner.for.body:
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1018
+// OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT:       omp.body.continue:
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT:       omp.inner.for.inc:
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT:       omp.inner.for.end:
+// OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT:       omp.loop.exit:
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_Z3bari
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR1]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[R:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[R_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[R]], align 4
+// OMP-DEFAULT-NEXT:    call void @_ZN2SA3fooEv(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
+// OMP-DEFAULT-NEXT:    call void @_ZN2SA3fooEv(ptr noundef nonnull align 4 dereferenceable(16) @a2)
+// OMP-DEFAULT-NEXT:    call void @_ZN2SB3fooEv(ptr noundef nonnull align 4 dereferenceable(32) @b1)
+// OMP-DEFAULT-NEXT:    call void @_ZN2SB3fooEv(ptr noundef nonnull align 4 dereferenceable(32) @b2)
+// OMP-DEFAULT-NEXT:    call void @_ZN2SC3fooEv(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
+// OMP-DEFAULT-NEXT:    call void @_ZN2SD3fooEv(ptr noundef nonnull align 4 dereferenceable(128) @d1)
+// OMP-DEFAULT-NEXT:    call void @_ZN2SE3fooEv(ptr noundef nonnull align 4 dereferenceable(256) @e1)
+// OMP-DEFAULT-NEXT:    call void @_ZN2STILi100EE3fooEv(ptr noundef nonnull align 4 dereferenceable(912) @t1)
+// OMP-DEFAULT-NEXT:    call void @_ZN2STILi1000EE3fooEv(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[R]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[R_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[R_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[TMP3]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 3, ptr [[TMP8]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT:    store ptr [[TMP6]], ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT:    store ptr @.offload_sizes.23, ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT:    store ptr @.offload_maptypes.24, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP16]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP18]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP21:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
+// OMP-DEFAULT-NEXT:    br i1 [[TMP22]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT:       omp_offload.failed:
+// OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267(i32 [[TMP2]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT:       omp_offload.cont:
+// OMP-DEFAULT-NEXT:    [[TMP23:%.*]] = load i32, ptr [[R]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP24:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP25]]
+// OMP-DEFAULT-NEXT:    ret i32 [[ADD]]
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SA3fooEv
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 1
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SB3fooEv
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT:    store ptr @.offload_sizes.25, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT:    store ptr @.offload_maptypes.26, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT:       omp_offload.failed:
+// OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT:       omp_offload.cont:
+// OMP-DEFAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SC3fooEv
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 7
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SD3fooEv
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 10
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SE3fooEv
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EE3fooEv
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT:    store ptr @.offload_sizes.27, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT:    store ptr @.offload_maptypes.28, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT:       omp_offload.failed:
+// OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT:       omp_offload.cont:
+// OMP-DEFAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EE3fooEv
+// OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
+// OMP-DEFAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
+// OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
+// OMP-DEFAULT-NEXT:    store i32 3, ptr [[TMP9]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
+// OMP-DEFAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
+// OMP-DEFAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
+// OMP-DEFAULT-NEXT:    store ptr @.offload_sizes.29, ptr [[TMP13]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
+// OMP-DEFAULT-NEXT:    store ptr @.offload_maptypes.30, ptr [[TMP14]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
+// OMP-DEFAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
+// OMP-DEFAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
+// OMP-DEFAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
+// OMP-DEFAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
+// OMP-DEFAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211.region_id, ptr [[KERNEL_ARGS]])
+// OMP-DEFAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
+// OMP-DEFAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
+// OMP-DEFAULT:       omp_offload.failed:
+// OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211(i32 [[TMP3]]) #[[ATTR2]]
+// OMP-DEFAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
+// OMP-DEFAULT:       omp_offload.cont:
+// OMP-DEFAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267
+// OMP-DEFAULT-SAME: (i32 noundef [[R:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[R_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[R_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[R]], ptr [[R_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[R_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[R_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[R_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[R:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[R_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[R]], ptr [[R_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT:       cond.true:
+// OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
+// OMP-DEFAULT:       cond.false:
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    br label [[COND_END]]
+// OMP-DEFAULT:       cond.end:
+// OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT:       omp.inner.for.cond:
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT:       omp.inner.for.body:
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[R_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP8]], 1
+// OMP-DEFAULT-NEXT:    store i32 [[INC]], ptr [[R_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT:       omp.body.continue:
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT:       omp.inner.for.inc:
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT:       omp.inner.for.end:
+// OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT:       omp.loop.exit:
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT:       cond.true:
+// OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
+// OMP-DEFAULT:       cond.false:
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    br label [[COND_END]]
+// OMP-DEFAULT:       cond.end:
+// OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT:       omp.inner.for.cond:
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT:       omp.inner.for.body:
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 4
+// OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT:       omp.body.continue:
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT:       omp.inner.for.inc:
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT:       omp.inner.for.end:
+// OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT:       omp.loop.exit:
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT:       cond.true:
+// OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
+// OMP-DEFAULT:       cond.false:
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    br label [[COND_END]]
+// OMP-DEFAULT:       cond.end:
+// OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT:       omp.inner.for.cond:
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT:       omp.inner.for.body:
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 13
+// OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT:       omp.body.continue:
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT:       omp.inner.for.inc:
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT:       omp.inner.for.end:
+// OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT:       omp.loop.exit:
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT:       cond.true:
+// OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
+// OMP-DEFAULT:       cond.false:
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    br label [[COND_END]]
+// OMP-DEFAULT:       cond.end:
+// OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT:       omp.inner.for.cond:
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT:       omp.inner.for.body:
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 116
+// OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT:       omp.body.continue:
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT:       omp.inner.for.inc:
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT:       omp.inner.for.end:
+// OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT:       omp.loop.exit:
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211
+// OMP-DEFAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
+// OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211.omp_outlined, i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211.omp_outlined
+// OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
+// OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
+// OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
+// OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
+// OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
+// OMP-DEFAULT:       cond.true:
+// OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
+// OMP-DEFAULT:       cond.false:
+// OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    br label [[COND_END]]
+// OMP-DEFAULT:       cond.end:
+// OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
+// OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
+// OMP-DEFAULT:       omp.inner.for.cond:
+// OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
+// OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
+// OMP-DEFAULT:       omp.inner.for.body:
+// OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
+// OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
+// OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
+// OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1016
+// OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
+// OMP-DEFAULT:       omp.body.continue:
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
+// OMP-DEFAULT:       omp.inner.for.inc:
+// OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
+// OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
+// OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
+// OMP-DEFAULT:       omp.inner.for.end:
+// OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
+// OMP-DEFAULT:       omp.loop.exit:
+// OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_GLOBAL__I_000500
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init()
+// OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.2()
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_GLOBAL__I_000501
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.3()
+// OMP-DEFAULT-NEXT:    ret void
+//
+//
+// OMP-DEFAULT-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_parallel_generic_loop_codegen_1.cpp
+// OMP-DEFAULT-SAME: () #[[ATTR0]] {
+// OMP-DEFAULT-NEXT:  entry:
+// OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.1()
+// OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.4()
+// OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.5()
+// OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.8()
+// OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.13()
+// OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.18()
+// OMP-DEFAULT-NEXT:    ret void
 //
 //
 //
diff --git a/clang/test/OpenMP/target_update_ast_print.cpp b/clang/test/OpenMP/target_update_ast_print.cpp
index d4cc84bc8b73c..33d5967a92c31 100644
--- a/clang/test/OpenMP/target_update_ast_print.cpp
+++ b/clang/test/OpenMP/target_update_ast_print.cpp
@@ -104,8 +104,8 @@ T foo(T targ, U uarg) {
 // CHECK:      int arr[100][100];
 // CHECK-NEXT: #pragma omp target update to(arr[2][0:1:2])
 // CHECK-NEXT: #pragma omp target update from(arr[2][0:1:2])
-// OMP5-NEXT: #pragma omp target update to(present: arr[2][0:1:2])
-// OMP5-NEXT: #pragma omp target update from(present: arr[2][0:1:2], a)
+// OMP51-NEXT: #pragma omp target update to(present: arr[2][0:1:2])
+// OMP51-NEXT: #pragma omp target update from(present: arr[2][0:1:2], a)
 
 int main(int argc, char **argv) {
   static int a;
@@ -125,9 +125,9 @@ int main(int argc, char **argv) {
 // CHECK-NEXT: #pragma omp target update from(argv[2][0:1:2])
 #ifdef OMP51
 #pragma omp target update to(present: argv[2][0:1:2])
-// OMP5-NEXT: #pragma omp target update to(present: arr[2][0:1:2])
+// OMP51-NEXT: #pragma omp target update to(present: arr[2][0:1:2])
 #pragma omp target update from(argv[2][0:1:2], a)
-// OMP5-NEXT: #pragma omp target update from(present: arr[2][0:1:2], a)
+// OMP51-NEXT: #pragma omp target update from(present: arr[2][0:1:2], a)
 #endif
 
 float marr[10][10][10];
diff --git a/clang/test/OpenMP/target_update_codegen.cpp b/clang/test/OpenMP/target_update_codegen.cpp
index c8211f475c7fc..5a751af907d52 100644
--- a/clang/test/OpenMP/target_update_codegen.cpp
+++ b/clang/test/OpenMP/target_update_codegen.cpp
@@ -826,7 +826,7 @@ struct SSA {
   SSA(double *&pr) : pr(pr) {}
 };
 
-//CK-15-LABEL: lvalue_member
+//CK15-LABEL: lvalue_member
 void lvalue_member(SSA *sap) {
 
   // CK15-DAG: call void @__tgt_target_data_update_mapper(ptr @{{.+}}, i64 -1, i32 2, ptr [[GEPBP:%.+]], ptr [[GEPP:%.+]], ptr [[GSIZE:%.+]], ptr [[MTYPE00]]{{.+}}, ptr null)
diff --git a/clang/test/Preprocessor/arm-target-features.c b/clang/test/Preprocessor/arm-target-features.c
index ecf9d7eb5c19c..ed5e6cc62b012 100644
--- a/clang/test/Preprocessor/arm-target-features.c
+++ b/clang/test/Preprocessor/arm-target-features.c
@@ -180,19 +180,19 @@
 // CHECK-V8-BAREHF: #define __ARM_FEATURE_CRC32 1
 // CHECK-V8-BAREHF: #define __ARM_FEATURE_DIRECTED_ROUNDING 1
 // CHECK-V8-BAREHF: #define __ARM_FEATURE_NUMERIC_MAXMIN 1
-// CHECK-V8-BAREHP: #define __ARM_FP 0xe
+// CHECK-V8-BAREHF: #define __ARM_FP 0xe
 // CHECK-V8-BAREHF: #define __ARM_NEON__ 1
 // CHECK-V8-BAREHF: #define __ARM_PCS_VFP 1
 // CHECK-V8-BAREHF: #define __VFP_FP__ 1
 
 // RUN: %clang -target armv8a -mfloat-abi=hard -mfpu=fp-armv8 -x c -E -dM %s | FileCheck -match-full-lines --check-prefix=CHECK-V8-BAREHF-FP %s
 // CHECK-V8-BAREHF-FP-NOT: __ARM_NEON__ 1
-// CHECK-V8-BAREHP-FP: #define __ARM_FP 0xe
+// CHECK-V8-BAREHF-FP: #define __ARM_FP 0xe
 // CHECK-V8-BAREHF-FP: #define __VFP_FP__ 1
 
 // RUN: %clang -target armv8a -mfloat-abi=hard -mfpu=neon-fp-armv8 -x c -E -dM %s | FileCheck -match-full-lines --check-prefix=CHECK-V8-BAREHF-NEON-FP %s
 // RUN: %clang -target armv8a -mfloat-abi=hard -mfpu=crypto-neon-fp-armv8 -x c -E -dM %s | FileCheck -match-full-lines --check-prefix=CHECK-V8-BAREHF-NEON-FP %s
-// CHECK-V8-BAREHP-NEON-FP: #define __ARM_FP 0xe
+// CHECK-V8-BAREHF-NEON-FP: #define __ARM_FP 0xe
 // CHECK-V8-BAREHF-NEON-FP: #define __ARM_NEON__ 1
 // CHECK-V8-BAREHF-NEON-FP: #define __VFP_FP__ 1
 
diff --git a/clang/test/SemaCXX/lambda-conversion-op-cc.cpp b/clang/test/SemaCXX/lambda-conversion-op-cc.cpp
index 6d9f5d702e132..50409ccd2948f 100644
--- a/clang/test/SemaCXX/lambda-conversion-op-cc.cpp
+++ b/clang/test/SemaCXX/lambda-conversion-op-cc.cpp
@@ -74,24 +74,24 @@ void useage() {
   // WIN32: CXXMethodDecl {{.*}} operator() 'void (int) __attribute__((thiscall)) const' implicit_instantiation inline
   //
   // NODEF: FunctionTemplateDecl {{.*}} operator auto (*)(type-parameter-0-0)
-  // VECDEF: FunctionTemplateDecl {{.*}} operator auto (*)(type-parameter-0-0) __attribute__((vectorcall))
+  // VECTDEF: FunctionTemplateDecl {{.*}} operator auto (*)(type-parameter-0-0) __attribute__((vectorcall))
   // LIN64: CXXConversionDecl {{.*}} operator auto (*)(type-parameter-0-0) 'auto (*() const noexcept)(auto)'
   // LIN64: CXXConversionDecl {{.*}} operator auto (*)(char) 'void (*() const noexcept)(char)'
   // LIN64: CXXConversionDecl {{.*}} operator auto (*)(int) 'void (*() const noexcept)(int)'
   // WIN32: CXXConversionDecl {{.*}} operator auto (*)(type-parameter-0-0) 'auto (*() __attribute__((thiscall)) const noexcept)(auto)'
   // WIN32: CXXConversionDecl {{.*}} operator auto (*)(char) 'void (*() __attribute__((thiscall)) const noexcept)(char)'
   // WIN32: CXXConversionDecl {{.*}} operator auto (*)(int) 'void (*() __attribute__((thiscall)) const noexcept)(int)'
-  // VECDEF: CXXConversionDecl {{.*}} operator auto (*)(type-parameter-0-0) __attribute__((vectorcall)) 'auto (*() const noexcept)(auto)' __attribute__((vectorcall))
-  // VECDEF: CXXConversionDecl {{.*}} operator auto (*)(char) __attribute__((vectorcall)) 'void (*() const noexcept)(char)' __attribute__((vectorcall))
-  // VECDEF: CXXConversionDecl {{.*}} operator auto (*)(int) __attribute__((vectorcall)) 'void (*() const noexcept)(int)' __attribute__((vectorcall))
+  // VECTDEF: CXXConversionDecl {{.*}} operator auto (*)(type-parameter-0-0) __attribute__((vectorcall)) 'auto (*() const noexcept)(auto) __attribute__((vectorcall))' inline
+  // VECTDEF: CXXConversionDecl {{.*}} operator auto (*)(char) __attribute__((vectorcall)) 'void (*() const noexcept)(char)' __attribute__((vectorcall))
+  // VECTDEF: CXXConversionDecl {{.*}} operator auto (*)(int) __attribute__((vectorcall)) 'void (*() const noexcept)(int)' __attribute__((vectorcall))
   //
   // CHECK: FunctionTemplateDecl {{.*}} __invoke
   // NODEF: CXXMethodDecl {{.*}} __invoke 'auto (auto)'
   // NODEF: CXXMethodDecl {{.*}} __invoke 'void (char)'
   // NODEF: CXXMethodDecl {{.*}} __invoke 'void (int)'
-  // VECDEF: CXXMethodDecl {{.*}} __invoke 'auto (auto) __attribute__((vectorcall))'
-  // VECDEF: CXXMethodDecl {{.*}} __invoke 'void (char) __attribute__((vectorcall))'
-  // VECDEF: CXXMethodDecl {{.*}} __invoke 'void (int) __attribute__((vectorcall))'
+  // VECTDEF: CXXMethodDecl {{.*}} __invoke 'auto (auto) __attribute__((vectorcall))'
+  // VECTDEF: CXXMethodDecl {{.*}} __invoke 'void (char) __attribute__((vectorcall))'
+  // VECTDEF: CXXMethodDecl {{.*}} __invoke 'void (int) __attribute__((vectorcall))'
   //
   // ONLY WIN32 has the duplicate here.
   // WIN32: FunctionTemplateDecl {{.*}} operator auto (*)(type-parameter-0-0) __attribute__((thiscall))
diff --git a/clang/test/SemaCXX/warn-unsafe-buffer-usage-fixits-multi-parm-span.cpp b/clang/test/SemaCXX/warn-unsafe-buffer-usage-fixits-multi-parm-span.cpp
index e3e50938cd7eb..f41d806ab4e09 100644
--- a/clang/test/SemaCXX/warn-unsafe-buffer-usage-fixits-multi-parm-span.cpp
+++ b/clang/test/SemaCXX/warn-unsafe-buffer-usage-fixits-multi-parm-span.cpp
@@ -35,18 +35,18 @@ void parmsSingleton(int *p) { //expected-warning{{'p' is an unsafe pointer used
 
 // Parameters other than `r` all will be fixed
 // CHECK: fix-it:{{.*}}:{[[@LINE+15]]:24-[[@LINE+15]]:30}:"std::span<int> p"
-// CHECK  fix-it:{{.*}}:{[[@LINE+14]]:32-[[@LINE+14]]:39}:"std::span<int *> q"
+// CHECK: fix-it:{{.*}}:{[[@LINE+14]]:32-[[@LINE+14]]:39}:"std::span<int *> q"
 // CHECK: fix-it:{{.*}}:{[[@LINE+13]]:41-[[@LINE+13]]:48}:"std::span<int> a"
 // CHECK: fix-it:{{.*}}:{[[@LINE+23]]:2-[[@LINE+23]]:2}:"\n{{\[}}{{\[}}clang::unsafe_buffer_usage{{\]}}{{\]}} void * multiParmAllFix(int *p, int **q, int a[], int * r) {return multiParmAllFix(std::span<int>(p, <# size #>), std::span<int *>(q, <# size #>), std::span<int>(a, <# size #>), r);}\n"
 
 // repeat 2 more times as each of the 3 fixing parameters generates the set of fix-its above.
 
 // CHECK: fix-it:{{.*}}:{[[@LINE+8]]:24-[[@LINE+8]]:30}:"std::span<int> p"
-// CHECK  fix-it:{{.*}}:{[[@LINE+7]]:32-[[@LINE+7]]:39}:"std::span<int *> q"
+// CHECK: fix-it:{{.*}}:{[[@LINE+7]]:32-[[@LINE+7]]:39}:"std::span<int *> q"
 // CHECK: fix-it:{{.*}}:{[[@LINE+6]]:41-[[@LINE+6]]:48}:"std::span<int> a"
 // CHECK: fix-it:{{.*}}:{[[@LINE+16]]:2-[[@LINE+16]]:2}:"\n{{\[}}{{\[}}clang::unsafe_buffer_usage{{\]}}{{\]}} void * multiParmAllFix(int *p, int **q, int a[], int * r) {return multiParmAllFix(std::span<int>(p, <# size #>), std::span<int *>(q, <# size #>), std::span<int>(a, <# size #>), r);}\n"
 // CHECK: fix-it:{{.*}}:{[[@LINE+4]]:24-[[@LINE+4]]:30}:"std::span<int> p"
-// CHECK  fix-it:{{.*}}:{[[@LINE+3]]:32-[[@LINE+3]]:39}:"std::span<int *> q"
+// CHECK: fix-it:{{.*}}:{[[@LINE+3]]:32-[[@LINE+3]]:39}:"std::span<int *> q"
 // CHECK: fix-it:{{.*}}:{[[@LINE+2]]:41-[[@LINE+2]]:48}:"std::span<int> a"
 // CHECK: fix-it:{{.*}}:{[[@LINE+12]]:2-[[@LINE+12]]:2}:"\n{{\[}}{{\[}}clang::unsafe_buffer_usage{{\]}}{{\]}} void * multiParmAllFix(int *p, int **q, int a[], int * r) {return multiParmAllFix(std::span<int>(p, <# size #>), std::span<int *>(q, <# size #>), std::span<int>(a, <# size #>), r);}\n"
 void * multiParmAllFix(int *p, int **q, int a[], int * r) { // expected-warning{{'p' is an unsafe pointer used for buffer access}}   expected-warning{{'q' is an unsafe pointer used for buffer access}} \
diff --git a/clang/test/SemaCXX/warn-unsafe-buffer-usage-fixits-pointer-access.cpp b/clang/test/SemaCXX/warn-unsafe-buffer-usage-fixits-pointer-access.cpp
index 4f6ccf12e4935..0f2ecc5c6aa55 100644
--- a/clang/test/SemaCXX/warn-unsafe-buffer-usage-fixits-pointer-access.cpp
+++ b/clang/test/SemaCXX/warn-unsafe-buffer-usage-fixits-pointer-access.cpp
@@ -101,7 +101,7 @@ void safe_method_invocation_single_param() {
 void safe_method_invocation_single_param_array() {
   int p[10];
   foo(p);
-  // CHECK-NO: fix-it:"{{.*}}":{[[@LINE-1]]:{{.*}}-[[@LINE-1]]:{{.*}}}:".data()"
+  // CHECK-NOT: fix-it:"{{.*}}":{[[@LINE-1]]:{{.*}}-[[@LINE-1]]:{{.*}}}:".data()"
 }
 
 void unsafe_method_invocation_double_param() {