[MCA] Update of RISCV/SiFive7/instruction-tables-tests.s#132972
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mshockwave merged 1 commit intollvm:mainfrom Mar 25, 2025
Merged
[MCA] Update of RISCV/SiFive7/instruction-tables-tests.s#132972mshockwave merged 1 commit intollvm:mainfrom
mshockwave merged 1 commit intollvm:mainfrom
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LGTM.
I believe this was caused by my change on MCSchedModel::getReciprocalThroughput.
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Fixing MR #130574 after merge in main branch.
Throughput has been updated in between.