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check_cfc: dash g generate different code with X86 LEA Fixup #43103

@llvmbot

Description

@llvmbot
Bugzilla Link 43758
Resolution FIXED
Resolved on Nov 01, 2019 21:38
Version trunk
OS Linux
Blocks #37076
Reporter LLVM Bugzilla Contributor
CC @topperc,@dwblaikie,@RKSimon,@zygoloid,@rotateright
Fixed by commit(s) 42d7746

Extended Description

Debug Info should have no effect on codegen, using check_cfc to scan llvm_test_suite, find a bug here:

Reproduce:

/home/chris/llvm-project/clang/utils/check_cfc/clang++ /home/chris/test-suite/MultiSource/Benchmarks/DOE-ProxyApps-C++/HPCCG/generate_matrix.cpp -w -c -O2 -o tmp.ll

Result:

Check CFC, checking: dash_g_no_change
/home/chris/test-suite/MultiSource/Benchmarks/DOE-ProxyApps-C++/HPCCG/generate_matrix.cpp Code difference detected with -g
--- /tmp/tmp_v0A26.o

+++ /tmp/tmpNWwZdV.o

@@ -216,6 +216,6 @@

321: 41 89 f6 mov %esi,%r14d
324: 48 8b b4 24 b8 00 00 mov 0xb8(%rsp),%rsi
32b: 00

  • 32c: 44 01 c6 add %r8d,%esi
  • 32f: 49 8b 53 38 mov 0x38(%r11),%rdx
  • 333: 48 63 ce movslq %esi,%rcx
  • 32c: 42 8d 34 06 lea (%rsi,%r8,1),%esi
  • 330: 49 8b 53 38 mov 0x38(%r11),%rdx
  • 334: 48 63 ce movslq %esi,%rcx
    *** Diff truncated ***

Analyze: clang++ with -g will generate different code with X86 LEA Fixup.

reduce the reproduce:

clang++ /home/chris/test-suite/MultiSource/Benchmarks/DOE-ProxyApps-C++/HPCCG/generate_matrix.cpp -c -O2 -mllvm -opt-bisect-limit=317 -o out1.o 2>log1
clang++ /home/chris/test-suite/MultiSource/Benchmarks/DOE-ProxyApps-C++/HPCCG/generate_matrix.cpp -c -O2 -mllvm -opt-bisect-limit=320 -o out2.o -g 2>log2
objdump -d -j .text out1.o > out1.obj
objdump -d -j .text out2.o > out2.obj
diff out1.obj out2.obj

Result:

--- out1.obj 2019-10-22 12:07:53.633672368 +0800
+++ out2.obj 2019-10-22 12:07:53.637672368 +0800
@@ -1,5 +1,5 @@

-out1.o: file format elf64-x86-64
+out2.o: file format elf64-x86-64

Disassembly of section .text:
@@ -217,32 +217,31 @@
321: 41 89 f6 mov %esi,%r14d
324: 48 8b b4 24 b8 00 00 mov 0xb8(%rsp),%rsi
32b: 00

  • 32c: 44 01 c6 add %r8d,%esi
  • 32f: 49 8b 53 38 mov 0x38(%r11),%rdx
  • 333: 48 63 ce movslq %esi,%rcx
  • 336: 48 89 04 ca mov %rax,(%rdx,%rcx,8)
  • 33a: 49 8b 55 00 mov 0x0(%r13),%rdx
  • 33e: 48 8b 52 40 mov 0x40(%rdx),%rdx
  • 342: 48 89 4c 24 28 mov %rcx,0x28(%rsp)
  • 347: 4c 89 3c ca mov %r15,(%rdx,%rcx,8)
  • 34b: 45 8d 58 ff lea -0x1(%r8),%r11d
  • 34f: 49 83 c2 01 add $0x1,%r10
  • 353: 45 31 c9 xor %r9d,%r9d
  • 356: b9 ff ff ff ff mov $0xffffffff,%ecx
  • 35b: 89 5c 24 78 mov %ebx,0x78(%rsp)
  • 35f: 89 da mov %ebx,%edx
  • 361: 48 89 54 24 48 mov %rdx,0x48(%rsp)
  • 366: 89 6c 24 74 mov %ebp,0x74(%rsp)
  • 36a: 89 ea mov %ebp,%edx
  • 36c: 48 89 54 24 38 mov %rdx,0x38(%rsp)
  • 371: 44 89 74 24 70 mov %r14d,0x70(%rsp)
  • 376: 44 89 f2 mov %r14d,%edx
  • 379: 48 89 54 24 40 mov %rdx,0x40(%rsp)
  • 37e: 4c 8b b4 24 a0 00 00 mov 0xa0(%rsp),%r14
  • 385: 00
  • 386: eb 43 jmp 3cb <Z15generate_matrixiiiPP24HPC_Sparse_Matrix_STRUCTPPdS3_S3+0x3cb>
  • 388: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1)
  • 38f: 00
  • 32c: 42 8d 34 06 lea (%rsi,%r8,1),%esi
  • 330: 49 8b 53 38 mov 0x38(%r11),%rdx
  • 334: 48 63 ce movslq %esi,%rcx
  • 337: 48 89 04 ca mov %rax,(%rdx,%rcx,8)
  • 33b: 49 8b 55 00 mov 0x0(%r13),%rdx
  • 33f: 48 8b 52 40 mov 0x40(%rdx),%rdx
  • 343: 48 89 4c 24 28 mov %rcx,0x28(%rsp)
  • 348: 4c 89 3c ca mov %r15,(%rdx,%rcx,8)
  • 34c: 45 8d 58 ff lea -0x1(%r8),%r11d
  • 350: 49 83 c2 01 add $0x1,%r10
  • 354: 45 31 c9 xor %r9d,%r9d
  • 357: b9 ff ff ff ff mov $0xffffffff,%ecx
  • 35c: 89 5c 24 78 mov %ebx,0x78(%rsp)
  • 360: 89 da mov %ebx,%edx
  • 362: 48 89 54 24 48 mov %rdx,0x48(%rsp)
  • 367: 89 6c 24 74 mov %ebp,0x74(%rsp)
  • 36b: 89 ea mov %ebp,%edx
  • 36d: 48 89 54 24 38 mov %rdx,0x38(%rsp)
  • 372: 44 89 74 24 70 mov %r14d,0x70(%rsp)
  • 377: 44 89 f2 mov %r14d,%edx
  • 37a: 48 89 54 24 40 mov %rdx,0x40(%rsp)
  • 37f: 4c 8b b4 24 a0 00 00 mov 0xa0(%rsp),%r14
  • 386: 00
  • 387: eb 42 jmp 3cb <Z15generate_matrixiiiPP24HPC_Sparse_Matrix_STRUCTPPdS3_S3+0x3cb>
  • 389: 0f 1f 80 00 00 00 00 nopl 0x0(%rax)
    390: 8b 4c 24 7c mov 0x7c(%rsp),%ecx
    394: 83 c1 01 add $0x1,%ecx
    397: 8b 54 24 1c mov 0x1c(%rsp),%edx

log1:
BISECT: running pass (317) X86 LEA Fixup on function (Z15generate_matrixiiiPP24HPC_Sparse_Matrix_STRUCTPPdS3_S3)

log2:
BISECT: running pass (320) X86 LEA Fixup on function (Z15generate_matrixiiiPP24HPC_Sparse_Matrix_STRUCTPPdS3_S3)

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