This repository was archived by the owner on Jan 7, 2023. It is now read-only.
-
Notifications
You must be signed in to change notification settings - Fork 53
Expand file tree
/
Copy pathanv_image.c
More file actions
1962 lines (1685 loc) · 75.3 KB
/
anv_image.c
File metadata and controls
1962 lines (1685 loc) · 75.3 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/*
* Copyright © 2015 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#include <assert.h>
#include <stdbool.h>
#include <string.h>
#include <unistd.h>
#include <fcntl.h>
#include <sys/mman.h>
#include "drm-uapi/drm_fourcc.h"
#include "anv_private.h"
#include "util/debug.h"
#include "vk_util.h"
#include "util/u_math.h"
#include "common/gen_aux_map.h"
#include "vk_format_info.h"
static isl_surf_usage_flags_t
choose_isl_surf_usage(VkImageCreateFlags vk_create_flags,
VkImageUsageFlags vk_usage,
isl_surf_usage_flags_t isl_extra_usage,
VkImageAspectFlagBits aspect)
{
isl_surf_usage_flags_t isl_usage = isl_extra_usage;
if (vk_usage & VK_IMAGE_USAGE_SAMPLED_BIT)
isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
if (vk_usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT)
isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
if (vk_usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT)
isl_usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT;
if (vk_create_flags & VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT)
isl_usage |= ISL_SURF_USAGE_CUBE_BIT;
/* Even if we're only using it for transfer operations, clears to depth and
* stencil images happen as depth and stencil so they need the right ISL
* usage bits or else things will fall apart.
*/
switch (aspect) {
case VK_IMAGE_ASPECT_DEPTH_BIT:
isl_usage |= ISL_SURF_USAGE_DEPTH_BIT;
break;
case VK_IMAGE_ASPECT_STENCIL_BIT:
isl_usage |= ISL_SURF_USAGE_STENCIL_BIT;
break;
case VK_IMAGE_ASPECT_COLOR_BIT:
case VK_IMAGE_ASPECT_PLANE_0_BIT:
case VK_IMAGE_ASPECT_PLANE_1_BIT:
case VK_IMAGE_ASPECT_PLANE_2_BIT:
break;
default:
unreachable("bad VkImageAspect");
}
if (vk_usage & VK_IMAGE_USAGE_TRANSFER_SRC_BIT) {
/* blorp implements transfers by sampling from the source image. */
isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
}
if (vk_usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT &&
aspect == VK_IMAGE_ASPECT_COLOR_BIT) {
/* blorp implements transfers by rendering into the destination image.
* Only request this with color images, as we deal with depth/stencil
* formats differently. */
isl_usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT;
}
return isl_usage;
}
static isl_tiling_flags_t
choose_isl_tiling_flags(const struct anv_image_create_info *anv_info,
const struct isl_drm_modifier_info *isl_mod_info,
bool legacy_scanout)
{
const VkImageCreateInfo *base_info = anv_info->vk_info;
isl_tiling_flags_t flags = 0;
switch (base_info->tiling) {
default:
unreachable("bad VkImageTiling");
case VK_IMAGE_TILING_OPTIMAL:
flags = ISL_TILING_ANY_MASK;
break;
case VK_IMAGE_TILING_LINEAR:
flags = ISL_TILING_LINEAR_BIT;
break;
}
if (anv_info->isl_tiling_flags)
flags &= anv_info->isl_tiling_flags;
if (legacy_scanout)
flags &= ISL_TILING_LINEAR_BIT | ISL_TILING_X_BIT;
if (isl_mod_info)
flags &= 1 << isl_mod_info->tiling;
assert(flags);
return flags;
}
static struct anv_surface *
get_surface(struct anv_image *image, VkImageAspectFlagBits aspect)
{
uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
return &image->planes[plane].surface;
}
static void
add_surface(struct anv_image *image, struct anv_surface *surf, uint32_t plane)
{
assert(surf->isl.size_B > 0); /* isl surface must be initialized */
if (image->disjoint) {
surf->offset = align_u32(image->planes[plane].size,
surf->isl.alignment_B);
/* Plane offset is always 0 when it's disjoint. */
} else {
surf->offset = align_u32(image->size, surf->isl.alignment_B);
/* Determine plane's offset only once when the first surface is added. */
if (image->planes[plane].size == 0)
image->planes[plane].offset = image->size;
}
image->size = surf->offset + surf->isl.size_B;
image->planes[plane].size = (surf->offset + surf->isl.size_B) - image->planes[plane].offset;
image->alignment = MAX2(image->alignment, surf->isl.alignment_B);
image->planes[plane].alignment = MAX2(image->planes[plane].alignment,
surf->isl.alignment_B);
}
static bool
all_formats_ccs_e_compatible(const struct gen_device_info *devinfo,
const VkImageFormatListCreateInfoKHR *fmt_list,
struct anv_image *image)
{
enum isl_format format =
anv_get_isl_format(devinfo, image->vk_format,
VK_IMAGE_ASPECT_COLOR_BIT, image->tiling);
if (!isl_format_supports_ccs_e(devinfo, format))
return false;
if (!(image->create_flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT))
return true;
if (!fmt_list || fmt_list->viewFormatCount == 0)
return false;
for (uint32_t i = 0; i < fmt_list->viewFormatCount; i++) {
enum isl_format view_format =
anv_get_isl_format(devinfo, fmt_list->pViewFormats[i],
VK_IMAGE_ASPECT_COLOR_BIT, image->tiling);
if (!isl_formats_are_ccs_e_compatible(devinfo, format, view_format))
return false;
}
return true;
}
/**
* For color images that have an auxiliary surface, request allocation for an
* additional buffer that mainly stores fast-clear values. Use of this buffer
* allows us to access the image's subresources while being aware of their
* fast-clear values in non-trivial cases (e.g., outside of a render pass in
* which a fast clear has occurred).
*
* In order to avoid having multiple clear colors for a single plane of an
* image (hence a single RENDER_SURFACE_STATE), we only allow fast-clears on
* the first slice (level 0, layer 0). At the time of our testing (Jan 17,
* 2018), there were no known applications which would benefit from fast-
* clearing more than just the first slice.
*
* The fast clear portion of the image is laid out in the following order:
*
* * 1 or 4 dwords (depending on hardware generation) for the clear color
* * 1 dword for the anv_fast_clear_type of the clear color
* * On gen9+, 1 dword per level and layer of the image (3D levels count
* multiple layers) in level-major order for compression state.
*
* For the purpose of discoverability, the algorithm used to manage
* compression and fast-clears is described here:
*
* * On a transition from UNDEFINED or PREINITIALIZED to a defined layout,
* all of the values in the fast clear portion of the image are initialized
* to default values.
*
* * On fast-clear, the clear value is written into surface state and also
* into the buffer and the fast clear type is set appropriately. Both
* setting the fast-clear value in the buffer and setting the fast-clear
* type happen from the GPU using MI commands.
*
* * Whenever a render or blorp operation is performed with CCS_E, we call
* genX(cmd_buffer_mark_image_written) to set the compression state to
* true (which is represented by UINT32_MAX).
*
* * On pipeline barrier transitions, the worst-case transition is computed
* from the image layouts. The command streamer inspects the fast clear
* type and compression state dwords and constructs a predicate. The
* worst-case resolve is performed with the given predicate and the fast
* clear and compression state is set accordingly.
*
* See anv_layout_to_aux_usage and anv_layout_to_fast_clear_type functions for
* details on exactly what is allowed in what layouts.
*
* On gen7-9, we do not have a concept of indirect clear colors in hardware.
* In order to deal with this, we have to do some clear color management.
*
* * For LOAD_OP_LOAD at the top of a renderpass, we have to copy the clear
* value from the buffer into the surface state with MI commands.
*
* * For any blorp operations, we pass the address to the clear value into
* blorp and it knows to copy the clear color.
*/
static void
add_aux_state_tracking_buffer(struct anv_image *image,
uint32_t plane,
const struct anv_device *device)
{
assert(image && device);
assert(image->planes[plane].aux_surface.isl.size_B > 0 &&
image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
/* Compressed images must be tiled and therefore everything should be 4K
* aligned. The CCS has the same alignment requirements. This is good
* because we need at least dword-alignment for MI_LOAD/STORE operations.
*/
assert(image->alignment % 4 == 0);
assert((image->planes[plane].offset + image->planes[plane].size) % 4 == 0);
/* This buffer should be at the very end of the plane. */
if (image->disjoint) {
assert(image->planes[plane].size ==
(image->planes[plane].offset + image->planes[plane].size));
} else {
assert(image->size ==
(image->planes[plane].offset + image->planes[plane].size));
}
const unsigned clear_color_state_size = device->info.gen >= 10 ?
device->isl_dev.ss.clear_color_state_size :
device->isl_dev.ss.clear_value_size;
/* Clear color and fast clear type */
unsigned state_size = clear_color_state_size + 4;
/* We only need to track compression on CCS_E surfaces. */
if (image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_E) {
if (image->type == VK_IMAGE_TYPE_3D) {
for (uint32_t l = 0; l < image->levels; l++)
state_size += anv_minify(image->extent.depth, l) * 4;
} else {
state_size += image->levels * image->array_size * 4;
}
}
/* Add some padding to make sure the fast clear color state buffer starts at
* a 4K alignment. We believe that 256B might be enough, but due to lack of
* testing we will leave this as 4K for now.
*/
image->planes[plane].size = ALIGN(image->planes[plane].size, 4096);
image->size = ALIGN(image->size, 4096);
assert(image->planes[plane].offset % 4096 == 0);
image->planes[plane].fast_clear_state_offset =
image->planes[plane].offset + image->planes[plane].size;
image->planes[plane].size += state_size;
image->size += state_size;
}
/**
* Initialize the anv_image::*_surface selected by \a aspect. Then update the
* image's memory requirements (that is, the image's size and alignment).
*/
static VkResult
make_surface(const struct anv_device *dev,
struct anv_image *image,
uint32_t stride,
isl_tiling_flags_t tiling_flags,
isl_surf_usage_flags_t isl_extra_usage_flags,
VkImageAspectFlagBits aspect)
{
bool ok;
static const enum isl_surf_dim vk_to_isl_surf_dim[] = {
[VK_IMAGE_TYPE_1D] = ISL_SURF_DIM_1D,
[VK_IMAGE_TYPE_2D] = ISL_SURF_DIM_2D,
[VK_IMAGE_TYPE_3D] = ISL_SURF_DIM_3D,
};
image->extent = anv_sanitize_image_extent(image->type, image->extent);
const unsigned plane = anv_image_aspect_to_plane(image->aspects, aspect);
const struct anv_format_plane plane_format =
anv_get_format_plane(&dev->info, image->vk_format, aspect, image->tiling);
struct anv_surface *anv_surf = &image->planes[plane].surface;
const isl_surf_usage_flags_t usage =
choose_isl_surf_usage(image->create_flags, image->usage,
isl_extra_usage_flags, aspect);
/* If an image is created as BLOCK_TEXEL_VIEW_COMPATIBLE, then we need to
* fall back to linear on Broadwell and earlier because we aren't
* guaranteed that we can handle offsets correctly. On Sky Lake, the
* horizontal and vertical alignments are sufficiently high that we can
* just use RENDER_SURFACE_STATE::X/Y Offset.
*/
bool needs_shadow = false;
isl_surf_usage_flags_t shadow_usage = 0;
if (dev->info.gen <= 8 &&
(image->create_flags & VK_IMAGE_CREATE_BLOCK_TEXEL_VIEW_COMPATIBLE_BIT) &&
image->tiling == VK_IMAGE_TILING_OPTIMAL) {
assert(isl_format_is_compressed(plane_format.isl_format));
tiling_flags = ISL_TILING_LINEAR_BIT;
needs_shadow = true;
shadow_usage = ISL_SURF_USAGE_TEXTURE_BIT |
(usage & ISL_SURF_USAGE_CUBE_BIT);
}
if (dev->info.gen <= 7 &&
aspect == VK_IMAGE_ASPECT_STENCIL_BIT &&
(image->stencil_usage & VK_IMAGE_USAGE_SAMPLED_BIT)) {
needs_shadow = true;
shadow_usage = ISL_SURF_USAGE_TEXTURE_BIT |
(usage & ISL_SURF_USAGE_CUBE_BIT);
}
ok = isl_surf_init(&dev->isl_dev, &anv_surf->isl,
.dim = vk_to_isl_surf_dim[image->type],
.format = plane_format.isl_format,
.width = image->extent.width / plane_format.denominator_scales[0],
.height = image->extent.height / plane_format.denominator_scales[1],
.depth = image->extent.depth,
.levels = image->levels,
.array_len = image->array_size,
.samples = image->samples,
.min_alignment_B = 0,
.row_pitch_B = stride,
.usage = usage,
.tiling_flags = tiling_flags);
if (!ok)
return VK_ERROR_OUT_OF_DEVICE_MEMORY;
image->planes[plane].aux_usage = ISL_AUX_USAGE_NONE;
add_surface(image, anv_surf, plane);
/* If an image is created as BLOCK_TEXEL_VIEW_COMPATIBLE, then we need to
* create an identical tiled shadow surface for use while texturing so we
* don't get garbage performance. If we're on gen7 and the image contains
* stencil, then we need to maintain a shadow because we can't texture from
* W-tiled images.
*/
if (needs_shadow) {
ok = isl_surf_init(&dev->isl_dev, &image->planes[plane].shadow_surface.isl,
.dim = vk_to_isl_surf_dim[image->type],
.format = plane_format.isl_format,
.width = image->extent.width,
.height = image->extent.height,
.depth = image->extent.depth,
.levels = image->levels,
.array_len = image->array_size,
.samples = image->samples,
.min_alignment_B = 0,
.row_pitch_B = stride,
.usage = shadow_usage,
.tiling_flags = ISL_TILING_ANY_MASK);
/* isl_surf_init() will fail only if provided invalid input. Invalid input
* is illegal in Vulkan.
*/
assert(ok);
add_surface(image, &image->planes[plane].shadow_surface, plane);
}
/* Add a HiZ surface to a depth buffer that will be used for rendering.
*/
if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
/* We don't advertise that depth buffers could be used as storage
* images.
*/
assert(!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT));
/* Allow the user to control HiZ enabling. Disable by default on gen7
* because resolves are not currently implemented pre-BDW.
*/
if (!(image->usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT)) {
/* It will never be used as an attachment, HiZ is pointless. */
} else if (dev->info.gen == 7) {
anv_perf_warn(dev->instance, image, "Implement gen7 HiZ");
} else if (image->levels > 1) {
anv_perf_warn(dev->instance, image, "Enable multi-LOD HiZ");
} else if (image->array_size > 1) {
anv_perf_warn(dev->instance, image,
"Implement multi-arrayLayer HiZ clears and resolves");
} else if (dev->info.gen == 8 && image->samples > 1) {
anv_perf_warn(dev->instance, image, "Enable gen8 multisampled HiZ");
} else if (!unlikely(INTEL_DEBUG & DEBUG_NO_HIZ)) {
assert(image->planes[plane].aux_surface.isl.size_B == 0);
ok = isl_surf_get_hiz_surf(&dev->isl_dev,
&image->planes[plane].surface.isl,
&image->planes[plane].aux_surface.isl);
assert(ok);
add_surface(image, &image->planes[plane].aux_surface, plane);
image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ;
}
} else if ((aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) && image->samples == 1) {
/* TODO: Disallow compression with :
*
* 1) non multiplanar images (We appear to hit a sampler bug with
* CCS & R16G16 format. Putting the clear state a page/4096bytes
* further fixes the issue).
*
* 2) alias images, because they might be aliases of images
* described in 1)
*
* 3) compression disabled by debug
*/
const bool allow_compression =
image->n_planes == 1 &&
(image->create_flags & VK_IMAGE_CREATE_ALIAS_BIT) == 0 &&
likely((INTEL_DEBUG & DEBUG_NO_RBC) == 0);
if (allow_compression) {
assert(image->planes[plane].aux_surface.isl.size_B == 0);
ok = isl_surf_get_ccs_surf(&dev->isl_dev,
&image->planes[plane].surface.isl,
&image->planes[plane].aux_surface.isl,
NULL, 0);
if (ok) {
/* Disable CCS when it is not useful (i.e., when you can't render
* to the image with CCS enabled).
*/
if (!isl_format_supports_rendering(&dev->info,
plane_format.isl_format)) {
/* While it may be technically possible to enable CCS for this
* image, we currently don't have things hooked up to get it
* working.
*/
anv_perf_warn(dev->instance, image,
"This image format doesn't support rendering. "
"Not allocating an CCS buffer.");
image->planes[plane].aux_surface.isl.size_B = 0;
return VK_SUCCESS;
}
/* For images created without MUTABLE_FORMAT_BIT set, we know that
* they will always be used with the original format. In
* particular, they will always be used with a format that
* supports color compression. If it's never used as a storage
* image, then it will only be used through the sampler or the as
* a render target. This means that it's safe to just leave
* compression on at all times for these formats.
*/
if (!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
image->ccs_e_compatible) {
image->planes[plane].aux_usage = ISL_AUX_USAGE_CCS_E;
} else if (dev->info.gen >= 12) {
anv_perf_warn(dev->instance, image,
"The CCS_D aux mode is not yet handled on "
"Gen12+. Not allocating a CCS buffer.");
image->planes[plane].aux_surface.isl.size_B = 0;
return VK_SUCCESS;
}
add_surface(image, &image->planes[plane].aux_surface, plane);
add_aux_state_tracking_buffer(image, plane, dev);
}
}
} else if ((aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) && image->samples > 1) {
assert(!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT));
assert(image->planes[plane].aux_surface.isl.size_B == 0);
ok = isl_surf_get_mcs_surf(&dev->isl_dev,
&image->planes[plane].surface.isl,
&image->planes[plane].aux_surface.isl);
if (ok) {
add_surface(image, &image->planes[plane].aux_surface, plane);
add_aux_state_tracking_buffer(image, plane, dev);
image->planes[plane].aux_usage = ISL_AUX_USAGE_MCS;
}
}
assert((image->planes[plane].offset + image->planes[plane].size) == image->size);
/* Upper bound of the last surface should be smaller than the plane's
* size.
*/
assert((MAX2(image->planes[plane].surface.offset,
image->planes[plane].aux_surface.offset) +
(image->planes[plane].aux_surface.isl.size_B > 0 ?
image->planes[plane].aux_surface.isl.size_B :
image->planes[plane].surface.isl.size_B)) <=
(image->planes[plane].offset + image->planes[plane].size));
if (image->planes[plane].aux_surface.isl.size_B) {
/* assert(image->planes[plane].fast_clear_state_offset == */
/* (image->planes[plane].aux_surface.offset + image->planes[plane].aux_surface.isl.size_B)); */
assert(image->planes[plane].fast_clear_state_offset <
(image->planes[plane].offset + image->planes[plane].size));
}
return VK_SUCCESS;
}
static uint32_t
score_drm_format_mod(uint64_t modifier)
{
switch (modifier) {
case DRM_FORMAT_MOD_LINEAR: return 1;
case I915_FORMAT_MOD_X_TILED: return 2;
case I915_FORMAT_MOD_Y_TILED: return 3;
case I915_FORMAT_MOD_Y_TILED_CCS: return 4;
default: unreachable("bad DRM format modifier");
}
}
static const struct isl_drm_modifier_info *
choose_drm_format_mod(const struct anv_physical_device *device,
uint32_t modifier_count, const uint64_t *modifiers)
{
uint64_t best_mod = UINT64_MAX;
uint32_t best_score = 0;
for (uint32_t i = 0; i < modifier_count; ++i) {
uint32_t score = score_drm_format_mod(modifiers[i]);
if (score > best_score) {
best_mod = modifiers[i];
best_score = score;
}
}
if (best_score > 0)
return isl_drm_modifier_get_info(best_mod);
else
return NULL;
}
VkResult
anv_image_create(VkDevice _device,
const struct anv_image_create_info *create_info,
const VkAllocationCallbacks* alloc,
VkImage *pImage)
{
ANV_FROM_HANDLE(anv_device, device, _device);
const VkImageCreateInfo *pCreateInfo = create_info->vk_info;
const struct isl_drm_modifier_info *isl_mod_info = NULL;
struct anv_image *image = NULL;
VkResult r;
assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
const struct wsi_image_create_info *wsi_info =
vk_find_struct_const(pCreateInfo->pNext, WSI_IMAGE_CREATE_INFO_MESA);
if (wsi_info && wsi_info->modifier_count > 0) {
isl_mod_info = choose_drm_format_mod(&device->instance->physicalDevice,
wsi_info->modifier_count,
wsi_info->modifiers);
assert(isl_mod_info);
}
anv_assert(pCreateInfo->mipLevels > 0);
anv_assert(pCreateInfo->arrayLayers > 0);
anv_assert(pCreateInfo->samples > 0);
anv_assert(pCreateInfo->extent.width > 0);
anv_assert(pCreateInfo->extent.height > 0);
anv_assert(pCreateInfo->extent.depth > 0);
image = vk_zalloc2(&device->alloc, alloc, sizeof(*image), 8,
VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
if (!image)
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
image->type = pCreateInfo->imageType;
image->extent = pCreateInfo->extent;
image->vk_format = pCreateInfo->format;
image->format = anv_get_format(pCreateInfo->format);
image->aspects = vk_format_aspects(image->vk_format);
image->levels = pCreateInfo->mipLevels;
image->array_size = pCreateInfo->arrayLayers;
image->samples = pCreateInfo->samples;
image->usage = pCreateInfo->usage;
image->create_flags = pCreateInfo->flags;
image->tiling = pCreateInfo->tiling;
image->disjoint = pCreateInfo->flags & VK_IMAGE_CREATE_DISJOINT_BIT;
image->needs_set_tiling = wsi_info && wsi_info->scanout;
image->drm_format_mod = isl_mod_info ? isl_mod_info->modifier :
DRM_FORMAT_MOD_INVALID;
if (image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
image->stencil_usage = pCreateInfo->usage;
const VkImageStencilUsageCreateInfoEXT *stencil_usage_info =
vk_find_struct_const(pCreateInfo->pNext,
IMAGE_STENCIL_USAGE_CREATE_INFO_EXT);
if (stencil_usage_info)
image->stencil_usage = stencil_usage_info->stencilUsage;
}
/* In case of external format, We don't know format yet,
* so skip the rest for now.
*/
if (create_info->external_format) {
image->external_format = true;
*pImage = anv_image_to_handle(image);
return VK_SUCCESS;
}
const struct anv_format *format = anv_get_format(image->vk_format);
assert(format != NULL);
const isl_tiling_flags_t isl_tiling_flags =
choose_isl_tiling_flags(create_info, isl_mod_info,
image->needs_set_tiling);
image->n_planes = format->n_planes;
const VkImageFormatListCreateInfoKHR *fmt_list =
vk_find_struct_const(pCreateInfo->pNext,
IMAGE_FORMAT_LIST_CREATE_INFO_KHR);
image->ccs_e_compatible =
all_formats_ccs_e_compatible(&device->info, fmt_list, image);
uint32_t b;
for_each_bit(b, image->aspects) {
r = make_surface(device, image, create_info->stride, isl_tiling_flags,
create_info->isl_extra_usage_flags, (1 << b));
if (r != VK_SUCCESS)
goto fail;
}
*pImage = anv_image_to_handle(image);
return VK_SUCCESS;
fail:
if (image)
vk_free2(&device->alloc, alloc, image);
return r;
}
static struct anv_image *
anv_swapchain_get_image(VkSwapchainKHR swapchain,
uint32_t index)
{
uint32_t n_images = index + 1;
VkImage *images = malloc(sizeof(*images) * n_images);
VkResult result = wsi_common_get_images(swapchain, &n_images, images);
if (result != VK_SUCCESS && result != VK_INCOMPLETE) {
free(images);
return NULL;
}
ANV_FROM_HANDLE(anv_image, image, images[index]);
free(images);
return image;
}
static VkResult
anv_image_from_swapchain(VkDevice device,
const VkImageCreateInfo *pCreateInfo,
const VkImageSwapchainCreateInfoKHR *swapchain_info,
const VkAllocationCallbacks *pAllocator,
VkImage *pImage)
{
struct anv_image *swapchain_image = anv_swapchain_get_image(swapchain_info->swapchain, 0);
assert(swapchain_image);
assert(swapchain_image->type == pCreateInfo->imageType);
assert(swapchain_image->vk_format == pCreateInfo->format);
assert(swapchain_image->extent.width == pCreateInfo->extent.width);
assert(swapchain_image->extent.height == pCreateInfo->extent.height);
assert(swapchain_image->extent.depth == pCreateInfo->extent.depth);
assert(swapchain_image->array_size == pCreateInfo->arrayLayers);
/* Color attachment is added by the wsi code. */
assert(swapchain_image->usage == (pCreateInfo->usage | VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT));
VkImageCreateInfo local_create_info;
local_create_info = *pCreateInfo;
local_create_info.pNext = NULL;
/* The following parameters are implictly selected by the wsi code. */
local_create_info.tiling = VK_IMAGE_TILING_OPTIMAL;
local_create_info.samples = VK_SAMPLE_COUNT_1_BIT;
local_create_info.usage |= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
/* If the image has a particular modifier, specify that modifier. */
struct wsi_image_create_info local_wsi_info = {
.sType = VK_STRUCTURE_TYPE_WSI_IMAGE_CREATE_INFO_MESA,
.modifier_count = 1,
.modifiers = &swapchain_image->drm_format_mod,
};
if (swapchain_image->drm_format_mod != DRM_FORMAT_MOD_INVALID)
__vk_append_struct(&local_create_info, &local_wsi_info);
return anv_image_create(device,
&(struct anv_image_create_info) {
.vk_info = &local_create_info,
.external_format = swapchain_image->external_format,
},
pAllocator,
pImage);
}
VkResult
anv_CreateImage(VkDevice device,
const VkImageCreateInfo *pCreateInfo,
const VkAllocationCallbacks *pAllocator,
VkImage *pImage)
{
const struct VkExternalMemoryImageCreateInfo *create_info =
vk_find_struct_const(pCreateInfo->pNext, EXTERNAL_MEMORY_IMAGE_CREATE_INFO);
if (create_info && (create_info->handleTypes &
VK_EXTERNAL_MEMORY_HANDLE_TYPE_ANDROID_HARDWARE_BUFFER_BIT_ANDROID))
return anv_image_from_external(device, pCreateInfo, create_info,
pAllocator, pImage);
bool use_external_format = false;
const struct VkExternalFormatANDROID *ext_format =
vk_find_struct_const(pCreateInfo->pNext, EXTERNAL_FORMAT_ANDROID);
/* "If externalFormat is zero, the effect is as if the
* VkExternalFormatANDROID structure was not present. Otherwise, the image
* will have the specified external format."
*/
if (ext_format && ext_format->externalFormat != 0)
use_external_format = true;
const VkNativeBufferANDROID *gralloc_info =
vk_find_struct_const(pCreateInfo->pNext, NATIVE_BUFFER_ANDROID);
if (gralloc_info)
return anv_image_from_gralloc(device, pCreateInfo, gralloc_info,
pAllocator, pImage);
const VkImageSwapchainCreateInfoKHR *swapchain_info =
vk_find_struct_const(pCreateInfo->pNext, IMAGE_SWAPCHAIN_CREATE_INFO_KHR);
if (swapchain_info && swapchain_info->swapchain != VK_NULL_HANDLE)
return anv_image_from_swapchain(device, pCreateInfo, swapchain_info,
pAllocator, pImage);
return anv_image_create(device,
&(struct anv_image_create_info) {
.vk_info = pCreateInfo,
.external_format = use_external_format,
},
pAllocator,
pImage);
}
void
anv_DestroyImage(VkDevice _device, VkImage _image,
const VkAllocationCallbacks *pAllocator)
{
ANV_FROM_HANDLE(anv_device, device, _device);
ANV_FROM_HANDLE(anv_image, image, _image);
if (!image)
return;
for (uint32_t p = 0; p < image->n_planes; ++p) {
if (anv_image_plane_uses_aux_map(device, image, p) &&
image->planes[p].address.bo) {
gen_aux_map_unmap_range(device->aux_map_ctx,
image->planes[p].aux_map_surface_address,
image->planes[p].surface.isl.size_B);
}
if (image->planes[p].bo_is_owned) {
assert(image->planes[p].address.bo != NULL);
anv_bo_cache_release(device, &device->bo_cache,
image->planes[p].address.bo);
}
}
vk_free2(&device->alloc, pAllocator, image);
}
static void anv_image_bind_memory_plane(struct anv_device *device,
struct anv_image *image,
uint32_t plane,
struct anv_device_memory *memory,
uint32_t memory_offset)
{
assert(!image->planes[plane].bo_is_owned);
if (!memory) {
if (anv_image_plane_uses_aux_map(device, image, plane) &&
image->planes[plane].address.bo) {
gen_aux_map_unmap_range(device->aux_map_ctx,
image->planes[plane].aux_map_surface_address,
image->planes[plane].surface.isl.size_B);
}
image->planes[plane].address = ANV_NULL_ADDRESS;
return;
}
image->planes[plane].address = (struct anv_address) {
.bo = memory->bo,
.offset = memory_offset,
};
if (anv_image_plane_uses_aux_map(device, image, plane)) {
image->planes[plane].aux_map_surface_address =
anv_address_physical(
anv_address_add(image->planes[plane].address,
image->planes[plane].surface.offset));
gen_aux_map_add_image(device->aux_map_ctx,
&image->planes[plane].surface.isl,
image->planes[plane].aux_map_surface_address,
anv_address_physical(
anv_address_add(image->planes[plane].address,
image->planes[plane].aux_surface.offset)));
}
}
/* We are binding AHardwareBuffer. Get a description, resolve the
* format and prepare anv_image properly.
*/
static void
resolve_ahw_image(struct anv_device *device,
struct anv_image *image,
struct anv_device_memory *mem)
{
#if defined(ANDROID) && ANDROID_API_LEVEL >= 26
assert(mem->ahw);
AHardwareBuffer_Desc desc;
AHardwareBuffer_describe(mem->ahw, &desc);
/* Check tiling. */
int i915_tiling = anv_gem_get_tiling(device, mem->bo->gem_handle);
VkImageTiling vk_tiling;
isl_tiling_flags_t isl_tiling_flags = 0;
switch (i915_tiling) {
case I915_TILING_NONE:
vk_tiling = VK_IMAGE_TILING_LINEAR;
isl_tiling_flags = ISL_TILING_LINEAR_BIT;
break;
case I915_TILING_X:
vk_tiling = VK_IMAGE_TILING_OPTIMAL;
isl_tiling_flags = ISL_TILING_X_BIT;
break;
case I915_TILING_Y:
vk_tiling = VK_IMAGE_TILING_OPTIMAL;
isl_tiling_flags = ISL_TILING_Y0_BIT;
break;
case -1:
default:
unreachable("Invalid tiling flags.");
}
assert(vk_tiling == VK_IMAGE_TILING_LINEAR ||
vk_tiling == VK_IMAGE_TILING_OPTIMAL);
/* Check format. */
VkFormat vk_format = vk_format_from_android(desc.format, desc.usage);
enum isl_format isl_fmt = anv_get_isl_format(&device->info,
vk_format,
VK_IMAGE_ASPECT_COLOR_BIT,
vk_tiling);
assert(isl_fmt != ISL_FORMAT_UNSUPPORTED);
/* Handle RGB(X)->RGBA fallback. */
switch (desc.format) {
case AHARDWAREBUFFER_FORMAT_R8G8B8_UNORM:
case AHARDWAREBUFFER_FORMAT_R8G8B8X8_UNORM:
if (isl_format_is_rgb(isl_fmt))
isl_fmt = isl_format_rgb_to_rgba(isl_fmt);
break;
}
/* Now we are able to fill anv_image fields properly and create
* isl_surface for it.
*/
image->vk_format = vk_format;
image->format = anv_get_format(vk_format);
image->aspects = vk_format_aspects(image->vk_format);
image->n_planes = image->format->n_planes;
image->ccs_e_compatible = false;
uint32_t stride = desc.stride *
(isl_format_get_layout(isl_fmt)->bpb / 8);
uint32_t b;
for_each_bit(b, image->aspects) {
VkResult r = make_surface(device, image, stride, isl_tiling_flags,
ISL_SURF_USAGE_DISABLE_AUX_BIT, (1 << b));
assert(r == VK_SUCCESS);
}
#endif
}
VkResult anv_BindImageMemory(
VkDevice _device,
VkImage _image,
VkDeviceMemory _memory,
VkDeviceSize memoryOffset)
{
ANV_FROM_HANDLE(anv_device, device, _device);
ANV_FROM_HANDLE(anv_device_memory, mem, _memory);
ANV_FROM_HANDLE(anv_image, image, _image);
if (mem->ahw)
resolve_ahw_image(device, image, mem);
uint32_t aspect_bit;
anv_foreach_image_aspect_bit(aspect_bit, image, image->aspects) {
uint32_t plane =
anv_image_aspect_to_plane(image->aspects, 1UL << aspect_bit);
anv_image_bind_memory_plane(device, image, plane, mem, memoryOffset);
}
return VK_SUCCESS;
}
VkResult anv_BindImageMemory2(
VkDevice _device,
uint32_t bindInfoCount,
const VkBindImageMemoryInfo* pBindInfos)
{
ANV_FROM_HANDLE(anv_device, device, _device);
for (uint32_t i = 0; i < bindInfoCount; i++) {
const VkBindImageMemoryInfo *bind_info = &pBindInfos[i];
ANV_FROM_HANDLE(anv_device_memory, mem, bind_info->memory);
ANV_FROM_HANDLE(anv_image, image, bind_info->image);
/* Resolve will alter the image's aspects, do this first. */
if (mem && mem->ahw)
resolve_ahw_image(device, image, mem);
VkImageAspectFlags aspects = image->aspects;
vk_foreach_struct_const(s, bind_info->pNext) {
switch (s->sType) {
case VK_STRUCTURE_TYPE_BIND_IMAGE_PLANE_MEMORY_INFO: {
const VkBindImagePlaneMemoryInfo *plane_info =
(const VkBindImagePlaneMemoryInfo *) s;
aspects = plane_info->planeAspect;
break;
}
case VK_STRUCTURE_TYPE_BIND_IMAGE_MEMORY_SWAPCHAIN_INFO_KHR: {
const VkBindImageMemorySwapchainInfoKHR *swapchain_info =
(const VkBindImageMemorySwapchainInfoKHR *) s;
struct anv_image *swapchain_image =
anv_swapchain_get_image(swapchain_info->swapchain,
swapchain_info->imageIndex);
assert(swapchain_image);
assert(image->aspects == swapchain_image->aspects);
assert(mem == NULL);
uint32_t aspect_bit;
anv_foreach_image_aspect_bit(aspect_bit, image, aspects) {
uint32_t plane =
anv_image_aspect_to_plane(image->aspects, 1UL << aspect_bit);
struct anv_device_memory mem = {
.bo = swapchain_image->planes[plane].address.bo,
};
anv_image_bind_memory_plane(device, image, plane,
&mem, bind_info->memoryOffset);
}
break;