I'm a university student passionate about RISC-V architecture and deep learning systems.
During my internship at the ISCAS July - December 2025, I contributed to optimizing neural network inference frameworks for RISC-V platforms.
🧠 MNN - RISC-V Vector Extension Optimization
Implemented 50+ optimized kernels using RISC-V Vector instructions:
- Data Packing:
MNNPackC2/C4,MNNUnpackC4,MNNTranspose32Bit/16Bit— #4021, #4023 - Matrix Ops:
MNNMatrixProd/Add/Sub/Max,MNNMaxFloat/MinFloat— #3779, #3913, #4036 - Convolution:
MNNConvRunForLineDepthwise,MNNDeconvRunForUnitDepthWise— #4042 - Activation:
MNNSoftmax,MNNReluWithSlopeChannel— #4044 - Interpolation:
CPUBilinearSampleC4,MNNCubicSampleC4/C16— #4053 - Image Processing:
MNNBGRAToBGR,MNNC3ToHSV/XYZ/YUV,MNNNV21ToRGB— #4067, #4079
🤖 vLLM - RISC-V Platform Adaptation
Contributed 8 merged PRs to enable vLLM on RISC-V:
| PR | Description |
|---|---|
| #24951 | Add OpenMP detection logic |
| #25816 | Add RISC-V to chunked detection exclusion list |
| #26228 | Force float32 on RISC-V for model compatibility |
| #26401 | Fix nix build & add local oneDNN support |
| #26693 | Disable torch compile on RISC-V |
| #28847 | Refactor with unroll_loop for better performance |
| xgrammar#458 | Port xgrammar library to RISC-V |
- 📧 Email: hebome@foxmail.com