Current Behaviour
more information in this Fritzing forum thread (although it is getting very long!)
https://forum.fritzing.org/t/mp3-player-project-pcb/29203
On Fritzing 1.0.5 this sketch
MP3_ESP32_done-no-ground-fill.fzz.zip
when ground filled, causes a short across the 3.3V supply. Running DRC on the ground filled sketch still claims that the sketch is ready for production (although it now has a short across the power supply.)
C5 should look like C6 as it is in parallel with C6. Here is the layout pre copper fill
Run DRC (with the setting changed from 0.01in to 0.007in due to the fpc connector being 05mm pitch and thus won't pass standard DRC setting), DRC passes.
unfortunately running DRC after the copper fill still passes even though there is now a short to ground from the 3.3V net due to the copper fill.
Going back to Fritzing 1.0.4 by default the same error occurs (because it is using the new copper fill code by default)
however changing to the old code
and not selecting fill here (which will use the new code) but rather the old code
appears to work correctly (although I have not done a full check of the gerbers yet!)
I just had the horrible thought that the fpc may be blocking the ground fill on the top layer, but there is a clear path on the bottom layer so the top layer will be ground through the capacitor through hole path.
Build:
Version 1.0.5
(CD-2185-0-b9add9ea 2025-04-02) 64 [Qt 6.5.3]
Operating System:
Windows 10
Steps to reproduce:
See
Current Behaviour
(which incidentally is misspelled!)
Expected Behaviour
The ground fill should work as the old code does in 1.0.4 and preferably DRC should detect and complain about the short (as it is not at all obvious if you don't check the gerbers and know what you are looking for!)
Current Behaviour
more information in this Fritzing forum thread (although it is getting very long!)
https://forum.fritzing.org/t/mp3-player-project-pcb/29203
On Fritzing 1.0.5 this sketch
MP3_ESP32_done-no-ground-fill.fzz.zip
when ground filled, causes a short across the 3.3V supply. Running DRC on the ground filled sketch still claims that the sketch is ready for production (although it now has a short across the power supply.)
C5 should look like C6 as it is in parallel with C6. Here is the layout pre copper fill
Run DRC (with the setting changed from 0.01in to 0.007in due to the fpc connector being 05mm pitch and thus won't pass standard DRC setting), DRC passes.
unfortunately running DRC after the copper fill still passes even though there is now a short to ground from the 3.3V net due to the copper fill.
Going back to Fritzing 1.0.4 by default the same error occurs (because it is using the new copper fill code by default)
however changing to the old code
and not selecting fill here (which will use the new code) but rather the old code
appears to work correctly (although I have not done a full check of the gerbers yet!)
I just had the horrible thought that the fpc may be blocking the ground fill on the top layer, but there is a clear path on the bottom layer so the top layer will be ground through the capacitor through hole path.
Build:
Version 1.0.5
(CD-2185-0-b9add9ea 2025-04-02) 64 [Qt 6.5.3]
Operating System:
Windows 10
Steps to reproduce:
See
Current Behaviour
(which incidentally is misspelled!)
Expected Behaviour
The ground fill should work as the old code does in 1.0.4 and preferably DRC should detect and complain about the short (as it is not at all obvious if you don't check the gerbers and know what you are looking for!)