ZK circuit development language (DSL) for Longfellow-ZK#1143
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ZK circuit development language (DSL) for Longfellow-ZK#1143
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updated to commit 0bb7e9d90aeeff478c0eb7cfc0625f1a40ac6272
also include LLM context
…oid large object file errors
these tests are mostly for demonstration only and will come back in another form once the JSON format protocol for longfellow circuits and proof is in place (WIP https://github.com/dyne/longfellow-zk)
simple circuit example and a full flow demonstrated
now also tiny simple expressions can be declared as function pointers as some syntax sugar that gets added via Lua.
add a Lua layer where we'll implement named wires and other features to facilitate circuit creation and maintenance
may still be improving some things around the way this is made
updated test/examples showing a bit the language progression now supporting more witness input metadata to link to the circuit
update our internal _type function to detect sol2 set property
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This DSL exposes all the development primitives of the Longfellow-ZK circuit and features a detailed educational demonstration of how a real-world zero-knowledge circuit proof system operates.