[RISC-V] Clean up NYI_RISCV64 in CodeGen and Emitter #94666
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In 6ca0784 commit, function genCodeForNegNot diverged from her LoongArch friend and didn't call genGetInsForOper since then. Therefore we can remove GT_NEG/GT_NOT integer cases and GT_NEG float case as there are all dead.
Given that such function doesn't make sense outside x86/x64 mov instruction context we can get rid of definition.
It looks like emitInsToJumpKind is helper function coming from ARM large jump handling logic. Currently RISC-V emitter doesn't rely on instruction format and probably won't need anything like ARM large jump handling.
For the cases when unreachability is easy to prove we can express that fact by using proper NO_WAY macro.
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Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch Issue DetailsThis PR focus mostly on NYI_RISCV64s that are easy to fix, remove or classify as ones that will need more care in future. Part of #84834
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yurai007
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Nov 13, 2023
tomeksowi
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Nov 13, 2023
Bajtazar
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sirntar
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ashaurtaev
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Nov 14, 2023
When control flow reach needCheckOv in intConst block, only addi/addiw instructions can be handled there and first NYI_RISCV64 is redundant. Remaining condition statements starting with GT_MUL case can be replaced with more straightforward switch statement and then second NYI_RISCV64 is redundant.
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tomeksowi
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tomeksowi
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clamp03
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clamp03
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When no helper for codeKind is available we need to emit appropriate code directly.
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@jakobbotsch Could you review this PR? Thank you. |
jakobbotsch
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This PR focus mostly on NYI_RISCV64s that are easy to fix, remove or classify as ones that will need more care in future.
Part of #84834
cc @wscho77 @HJLeee @clamp03 @JongHeonChoi @t-mustafin @gbalykov @ashaurtaev @sirntar @tomeksowi @Bajtazar